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authorWim Vervoorn <wvervoorn@eltan.com>2019-12-13 12:06:44 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-12-17 13:11:09 +0000
commitd908916642eadf613e02d083cc54c9dacea28152 (patch)
tree3a373bcf02bc3c85dcd967342c318cd45c59d77a /src
parent9cb88a70f7a636806752542216e177ba625e77d2 (diff)
downloadcoreboot-d908916642eadf613e02d083cc54c9dacea28152.tar.xz
soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash range
The base address of the 16 MB flash range was reported as 0xFFF00000 this causes the range to extend above the 4GB boundary. Change the base to 0xFF000000 as is the case with e.g. Skylake. BUG=N/A TEST=build Change-Id: Ia8de01769ced00c5ae13f255760401933230b88c Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37694 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/cannonlake/acpi/northbridge.asl2
-rw-r--r--src/soc/intel/icelake/acpi/northbridge.asl2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/cannonlake/acpi/northbridge.asl b/src/soc/intel/cannonlake/acpi/northbridge.asl
index 22ddad7fbb..25291163cf 100644
--- a/src/soc/intel/cannonlake/acpi/northbridge.asl
+++ b/src/soc/intel/cannonlake/acpi/northbridge.asl
@@ -307,7 +307,7 @@ Device (PDRC)
Memory32Fixed (ReadOnly, VTD_BASE_ADDRESS, VTD_BASE_SIZE)
/* FLASH range */
- Memory32Fixed (ReadOnly, 0xFFF00000, 0x1000000, FIOH)
+ Memory32Fixed (ReadOnly, 0xFF000000, 0x1000000, FIOH)
/* Local APIC range(0xFEE0_0000 to 0xFEEF_FFFF) */
Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000, LIOH)
diff --git a/src/soc/intel/icelake/acpi/northbridge.asl b/src/soc/intel/icelake/acpi/northbridge.asl
index e99e7edf1f..68c7f9e9fd 100644
--- a/src/soc/intel/icelake/acpi/northbridge.asl
+++ b/src/soc/intel/icelake/acpi/northbridge.asl
@@ -308,7 +308,7 @@ Device (PDRC)
Memory32Fixed (ReadOnly, VTD_BASE_ADDRESS, VTD_BASE_SIZE)
/* FLASH range */
- Memory32Fixed (ReadOnly, 0xFFF00000, 0x1000000, FIOH)
+ Memory32Fixed (ReadOnly, 0xFF000000, 0x1000000, FIOH)
/* Local APIC range(0xFEE0_0000 to 0xFEEF_FFFF) */
Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000, LIOH)