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| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2018-11-07 08:50:45 +0100 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2018-11-12 07:25:42 +0000 |
| commit | d985cdc7638967889e586447fb58a9c14bf72c63 (patch) | |
| tree | 8f9fe99ceb2beb108b4f6c105ddbf2c4a235553e /src | |
| parent | bcbcecd38ff6273bb9e8bf45da8e5f1578a72728 (diff) | |
| download | coreboot-d985cdc7638967889e586447fb58a9c14bf72c63.tar.xz | |
siemens/mc_apl3: Set bus master bit for on-board PCI device
There is an on-board PCI device where bus master has to be enabled in
PCI configuration space. As there is no need for a complete PCI driver
for this device just set the bus master bit in mainboard_final().
Change-Id: I1ef4a7774d4ca75c230063debbc63d03486fed6f
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/29528
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c index bfcf38ef5f..f41fe732f3 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c @@ -15,6 +15,7 @@ #include <bootstate.h> #include <console/console.h> +#include <device/pci_def.h> #include <device/pci_ids.h> #include <device/pci_ops.h> #include <gpio.h> @@ -31,6 +32,7 @@ void variant_mainboard_final(void) { struct device *dev = NULL; + uint16_t cmd = 0; /* PIR6 register mapping for PCIe root ports * INTA#->PIRQD#, INTB#->PIRQA#, INTC#->PIRQB#, INTD#-> PIRQC# @@ -52,6 +54,14 @@ void variant_mainboard_final(void) * offset 0x341C bit [3:0]. */ pcr_or32(PID_LPC, PCR_LPC_PRC, (PCR_LPC_CCE_EN | PCR_LPC_PCE_EN)); + + /* Set Master Enable for on-board PCI device. */ + dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403e, 0); + if (dev) { + cmd = pci_read_config16(dev, PCI_COMMAND); + cmd |= PCI_COMMAND_MASTER; + pci_write_config16(dev, PCI_COMMAND, cmd); + } } static void wait_for_legacy_dev(void *unused) |