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authorVaradarajan Narayanan <varada@codeaurora.org>2015-11-16 13:22:02 +0530
committerPatrick Georgi <pgeorgi@google.com>2016-05-10 23:20:22 +0200
commitdb0c3b3192e7850204b6b87edf701e3bda977cbd (patch)
tree9ab9f71f56f01d7e780ee67645135e411b3c0d51 /src
parenta86a1837d25d5b2f6737a532611b8d974134d60f (diff)
downloadcoreboot-db0c3b3192e7850204b6b87edf701e3bda977cbd.tar.xz
soc/qualcomm/ipq40xx: Map OCIMEM
DDR binary runs from here BUG=chrome-os-partner:49249 TEST=Boots and DDR seems to be usable BRANCH=none Change-Id: I6111dddcabf05e5cb84ee9ebcc1803addb1e91cf Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 7baf2079845964a150f51d558b396a1a9b0dc0a3 Original-Change-Id: I1d7230b229db3abfb73e6d8f9ca085650e6abec8 Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Original-Reviewed-on: https://chromium-review.googlesource.com/333313 Original-Commit-Ready: David Hendricks <dhendrix@chromium.org> Original-Tested-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://review.coreboot.org/14671 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/gale/mmu.c7
-rw-r--r--src/mainboard/google/gale/mmu.h2
2 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/google/gale/mmu.c b/src/mainboard/google/gale/mmu.c
index 6c096a5bf4..4b0ffec301 100644
--- a/src/mainboard/google/gale/mmu.c
+++ b/src/mainboard/google/gale/mmu.c
@@ -20,6 +20,9 @@
#define WIFI_IMEM_1_START ((uintptr_t)_wifi_imem_1 / KiB)
#define WIFI_IMEM_1_END ((uintptr_t)_ewifi_imem_1 / KiB)
+#define OC_IMEM_START ((uintptr_t)_oc_imem / KiB)
+#define OC_IMEM_END ((uintptr_t)_eoc_imem / KiB)
+
#define DRAM_START ((uintptr_t)_dram / MiB)
#define DRAM_SIZE (CONFIG_DRAM_SIZE_MB)
#define DRAM_END (DRAM_START + DRAM_SIZE)
@@ -61,6 +64,10 @@ void setup_mmu(enum dram_state dram)
WIFI_IMEM_1_END - WIFI_IMEM_1_START,
DCACHE_WRITEBACK);
+ mmu_config_range_kb(OC_IMEM_START,
+ OC_IMEM_END - OC_IMEM_START,
+ DCACHE_WRITEBACK);
+
/* Map DRAM memory */
setup_dram_mappings(dram);
diff --git a/src/mainboard/google/gale/mmu.h b/src/mainboard/google/gale/mmu.h
index e3347c8c2f..f7bffd26af 100644
--- a/src/mainboard/google/gale/mmu.h
+++ b/src/mainboard/google/gale/mmu.h
@@ -16,6 +16,8 @@ extern u8 _wifi_imem_0[]; /* Linker script supplied */
extern u8 _ewifi_imem_0[];
extern u8 _wifi_imem_1[];
extern u8 _ewifi_imem_1[];
+extern u8 _oc_imem[];
+extern u8 _eoc_imem[];
enum dram_state {
DRAM_INITIALIZED = 0,