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authorTristan Shieh <tristan.shieh@mediatek.com>2019-07-10 15:02:39 +0800
committerMartin Roth <martinroth@google.com>2019-07-11 15:10:03 +0000
commite13a65c5ffd066272f1a224120bbc5788f56106c (patch)
tree49a06b90cd8748b14da109552ee82ea948324966 /src
parent447badd1cfbf70a26f3e6fb0b84d8166dc732bc4 (diff)
downloadcoreboot-e13a65c5ffd066272f1a224120bbc5788f56106c.tar.xz
mediatek: Fill in input_hertz to coreboot table
Set input_hertz to 26 MHz. BUG=b:134351649 BRANCH=none TEST=emerge-kukui coreboot; emerge-elm coreboot Change-Id: I7f9c329ae5d610f2516e60f06b2ac96ebbeaa897 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34191 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/mediatek/common/uart.c4
-rw-r--r--src/soc/mediatek/mt8183/include/soc/pll.h1
2 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/mediatek/common/uart.c b/src/soc/mediatek/common/uart.c
index 20ec8766c4..8905c55528 100644
--- a/src/soc/mediatek/common/uart.c
+++ b/src/soc/mediatek/common/uart.c
@@ -20,6 +20,7 @@
#include <stdint.h>
#include <soc/addressmap.h>
+#include <soc/pll.h>
struct mtk_uart {
union {
@@ -84,7 +85,7 @@ static int mtk_uart_tst_byte(void);
static void mtk_uart_init(void)
{
/* Use a hardcoded divisor for now. */
- const unsigned int uartclk = 26 * MHz;
+ const unsigned int uartclk = UART_HZ;
const unsigned int baudrate = get_uart_baudrate();
const uint8_t line_config = UART8250_LCR_WLS_8; /* 8n1 */
unsigned int highspeed, quot, divisor, remainder;
@@ -177,6 +178,7 @@ void uart_fill_lb(void *data)
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = UART0_BASE;
+ serial.input_hertz = UART_HZ;
serial.baud = get_uart_baudrate();
serial.regwidth = 4;
lb_add_serial(&serial, data);
diff --git a/src/soc/mediatek/mt8183/include/soc/pll.h b/src/soc/mediatek/mt8183/include/soc/pll.h
index 3807e0087e..5a24e75692 100644
--- a/src/soc/mediatek/mt8183/include/soc/pll.h
+++ b/src/soc/mediatek/mt8183/include/soc/pll.h
@@ -268,6 +268,7 @@ enum {
/* top_mux rate */
enum {
SPI_HZ = MAINPLL_D5_D2_HZ,
+ UART_HZ = CLK26M_HZ,
};
enum {