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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-05-03 18:39:33 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-06-06 19:25:34 +0000 |
| commit | e1780e9047ae12eae64df5ac3d2c19e5725e58b5 (patch) | |
| tree | a336922399674556bb83bda1f52fc1dd80967373 /src | |
| parent | aa67defafd09979081d2269cb1ab060417525816 (diff) | |
| download | coreboot-e1780e9047ae12eae64df5ac3d2c19e5725e58b5.tar.xz | |
soc/amd/stoneyridge: Add ALink-AHB Bridge to iomap.h
Add the address and replace the hardcoded value in the ASL code.
Change-Id: If0b99de78d8c5948e2e5f2aa50dfc2efc1bd1ba1
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32662
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/stoneyridge/acpi/sb_fch.asl | 2 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/iomap.h | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/acpi/sb_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_fch.asl index 4c1196dad6..e7975f8d94 100644 --- a/src/soc/amd/stoneyridge/acpi/sb_fch.asl +++ b/src/soc/amd/stoneyridge/acpi/sb_fch.asl @@ -22,7 +22,7 @@ Device (AAHB) Name (_UID, 0x0) Name (_CRS, ResourceTemplate() { - Memory32Fixed (ReadWrite, 0xFEDC0000, 0x2000) + Memory32Fixed (ReadWrite, ALINK_AHB_ADDRESS, 0x2000) }) Method (_STA, 0x0, NotSerialized) diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h index 1caef3362f..3856a22796 100644 --- a/src/soc/amd/stoneyridge/include/soc/iomap.h +++ b/src/soc/amd/stoneyridge/include/soc/iomap.h @@ -25,6 +25,8 @@ /* AcpiMmio blocks are at fixed offsets from FED8_0000h, enabled in PMx04[1] */ #include <amdblocks/acpimmio_map.h> +#define ALINK_AHB_ADDRESS 0xfedc0000 + /* I2C fixed address */ #define I2C_BASE_ADDRESS 0xfedc2000 #define I2C_DEVICE_SIZE 0x00001000 |