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| author | Martin Roth <martinroth@google.com> | 2016-01-31 10:37:22 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-02-02 01:44:12 +0100 |
| commit | 1010868f87db1e449a13833be4991cef9cf8b0fc (patch) | |
| tree | 3b17a23eac37b26c924ef666ccdb6e932703f151 /src | |
| parent | 9ab9c33d7d97ebe1d8e5d25eb4b646f310b5f188 (diff) | |
| download | coreboot-1010868f87db1e449a13833be4991cef9cf8b0fc.tar.xz | |
src/: Fix Kcofig symbols missing CONFIG_ prefix
- Add CONFIG_ prefix to two symbols.
- Remove the use of the third symbol as it will never be matched.
Change-Id: Ifa7f6884001cb05fb8397f193c4b08a0161f498c
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13539
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/cpu/amd/car/disable_cache_as_ram.c | 2 | ||||
| -rw-r--r-- | src/mainboard/intel/bayleybay_fsp/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/siemens/mc_tcu3/romstage.c | 4 |
3 files changed, 2 insertions, 6 deletions
diff --git a/src/cpu/amd/car/disable_cache_as_ram.c b/src/cpu/amd/car/disable_cache_as_ram.c index e8d5af8047..1eb3dd756f 100644 --- a/src/cpu/amd/car/disable_cache_as_ram.c +++ b/src/cpu/amd/car/disable_cache_as_ram.c @@ -72,7 +72,7 @@ static inline __attribute__((always_inline)) void disable_cache_as_ram(uint8_t s family = amd_fam1x_cpu_family(); -#if IS_ENABLED(CPU_AMD_MODEL_10XXX) +#if IS_ENABLED(CONFIG_CPU_AMD_MODEL_10XXX) if (family >= 0x6f) { /* Family 15h or later */ diff --git a/src/mainboard/intel/bayleybay_fsp/romstage.c b/src/mainboard/intel/bayleybay_fsp/romstage.c index 7af782f0f3..56ca33a0c5 100644 --- a/src/mainboard/intel/bayleybay_fsp/romstage.c +++ b/src/mainboard/intel/bayleybay_fsp/romstage.c @@ -171,7 +171,7 @@ void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer) UpdData->AzaliaConfigPtr = (UINT32)&mainboard_AzaliaConfig; /* Disable 2nd DIMM on Bakersport*/ -#if IS_ENABLED(BOARD_INTEL_BAKERSPORT_FSP) +#if IS_ENABLED(CONFIG_BOARD_INTEL_BAKERSPORT_FSP) UpdData->PcdMrcInitSPDAddr2 = 0x00; /* cannot use SPD_ADDR_DISABLED at this point */ #endif } diff --git a/src/mainboard/siemens/mc_tcu3/romstage.c b/src/mainboard/siemens/mc_tcu3/romstage.c index 49483e53e0..1fa78ca3da 100644 --- a/src/mainboard/siemens/mc_tcu3/romstage.c +++ b/src/mainboard/siemens/mc_tcu3/romstage.c @@ -172,10 +172,6 @@ void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer) /* Initialize the Azalia Verb Tables to mainboard specific version */ UpdData->AzaliaConfigPtr = (UINT32)&mainboard_AzaliaConfig; - /* Disable 2nd DIMM on Bakersport*/ -#if IS_ENABLED(BOARD_INTEL_BAKERSPORT_FSP) - UpdData->PcdMrcInitSPDAddr2 = 0x00; /* cannot use SPD_ADDR_DISABLED at this point */ -#endif /* Get SPD data from hardware information block and setup memory down */ /* parameters for FSP accordingly */ hwi_main = get_hwinfo((char*)"hwinfo.hex"); |