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| author | Huayang Duan <huayang.duan@mediatek.com> | 2019-07-24 09:57:40 +0800 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2019-08-16 19:52:44 +0000 |
| commit | 126d4198a9739f07fe456da27aef10076b955185 (patch) | |
| tree | f2391a5b04e9e6a3ffba451100317dec2896e3d0 /src | |
| parent | f4aa501ecacb3cbc3774d01b5f9209f71bd578cf (diff) | |
| download | coreboot-126d4198a9739f07fe456da27aef10076b955185.tar.xz | |
mediatek/mt8183: Add SAMSUNG 4GB LPDDR4X discrete DDR support
BUG=b:80501386
BRANCH=none
TEST=Boots correctly and stress test passes on Kukui.
Change-Id: I27164f0909edb9d9398835e292fb845f0e342391
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34532
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Huayang Duan <huayang.duan@mediatek.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
3 files changed, 43 insertions, 0 deletions
diff --git a/src/mainboard/google/kukui/sdram_configs.c b/src/mainboard/google/kukui/sdram_configs.c index d8b3cc4c2f..b6277eaebf 100644 --- a/src/mainboard/google/kukui/sdram_configs.c +++ b/src/mainboard/google/kukui/sdram_configs.c @@ -26,6 +26,7 @@ static const char *const sdram_configs[] = { [5] = "sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB", [6] = "sdram-lpddr4x-KMDV6001DA-B620-4GB", [7] = "sdram-lpddr4x-SDADA4CR-128G-4GB", + [8] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB", }; static struct sdram_params params; diff --git a/src/mainboard/google/kukui/sdram_params/Makefile.inc b/src/mainboard/google/kukui/sdram_params/Makefile.inc index fbc505b588..4d91998e52 100644 --- a/src/mainboard/google/kukui/sdram_params/Makefile.inc +++ b/src/mainboard/google/kukui/sdram_params/Makefile.inc @@ -1,4 +1,5 @@ sdram-params := +sdram-params += sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB sdram-params += sdram-lpddr4x-H9HCNNNCPMALHR-4GB sdram-params += sdram-lpddr4x-MT53E1G32D4NQ-4GB sdram-params += sdram-lpddr4x-KMDH6001DA-B422-4GB diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c new file mode 100644 index 0000000000..8d855ff1ba --- /dev/null +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c @@ -0,0 +1,41 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <soc/emi.h> + +struct sdram_params params = { + .impedance = { + [ODT_OFF] = {0x9, 0x7, 0x0, 0xF}, + [ODT_ON] = {0xB, 0x9, 0x0, 0xE} + }, + .wr_level = { + [CHANNEL_A] = { {0x22, 0x1C}, {0x23, 0x1D} }, + [CHANNEL_B] = { {0x26, 0x23}, {0x26, 0x23} } + }, + .cbt_cs = { + [CHANNEL_A] = {0x6, 0x5}, + [CHANNEL_B] = {0x6, 0x6} + }, + .cbt_mr12 = { + [CHANNEL_A] = {0x56, 0x58}, + [CHANNEL_B] = {0x58, 0x56} + }, + .emi_cona_val = 0xF053F154, + .emi_conh_val = 0x44440003, + .emi_conf_val = 0x00421000, + .chn_emi_cona_val = {0x0444F051, 0x0444F051}, + .cbt_mode_extern = CBT_NORMAL_MODE, + .delay_cell_unit = 868, +}; |