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authorPatrick Georgi <pgeorgi@chromium.org>2015-11-26 16:39:23 +0100
committerPatrick Georgi <pgeorgi@google.com>2015-12-02 17:30:36 +0100
commit1cab0125cc6e07c6141b79019dea5aa5ea295213 (patch)
tree3778579f79eb3941c8b48059ea97977ee87bc111 /src
parent67cb6aa6a779ad3d021570385e61308d333c116d (diff)
downloadcoreboot-1cab0125cc6e07c6141b79019dea5aa5ea295213.tar.xz
build system: Add more files through cbfs-files instead of manual rules
verstage, romstage, and payload can be added through infrastructure now. Change-Id: Ib9e612ae35fb8c0230175f5b8bca1b129f366f4b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/12549 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/arch/arm/Makefile.inc1
-rw-r--r--src/arch/riscv/Makefile.inc1
-rw-r--r--src/arch/x86/Makefile.inc12
-rw-r--r--src/vendorcode/google/chromeos/vboot2/Makefile.inc10
4 files changed, 9 insertions, 15 deletions
diff --git a/src/arch/arm/Makefile.inc b/src/arch/arm/Makefile.inc
index 5af9ab8c50..6675360c4a 100644
--- a/src/arch/arm/Makefile.inc
+++ b/src/arch/arm/Makefile.inc
@@ -23,7 +23,6 @@
ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM),y)
CBFSTOOL_PRE1_OPTS = -m arm -s $(CONFIG_CBFS_SIZE)
-CBFSTOOL_PRE_OPTS = -b 0
endif
ifeq ($(CONFIG_ARCH_ARM),y)
diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc
index 49c130bb5b..aafce1af75 100644
--- a/src/arch/riscv/Makefile.inc
+++ b/src/arch/riscv/Makefile.inc
@@ -72,7 +72,6 @@ romstage-c-ccopts += $(riscv_flags)
romstage-S-ccopts += $(riscv_asm_flags)
CBFSTOOL_PRE1_OPTS = -v -m riscv -s $(CONFIG_CBFS_SIZE)
-CBFSTOOL_PRE_OPTS = -v
endif
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 5829983165..d552aa2894 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -50,15 +50,6 @@ mbi.bin-type := mbi
ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
CBFSTOOL_PRE1_OPTS = -m x86 -s $(CONFIG_ROM_SIZE) \
-o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) ))
-# Use a '-a 64' option to cbfstool locate to provide a minimum alignment
-# requirement for the overall romstage. While the first object within
-# romstage could have a 4 byte minimum alignment that doesn't mean the linker
-# won't decide the entire section should be aligned to a larger value. In the
-# future cbfstool should add XIP files proper and honor the alignment
-# requirements of the program segment.
-#
-# Make sure that segment for .car.data is ignored while adding romstage.
-CBFSTOOL_PRE_OPTS = -a 64 --xip -S ".car.data" -P $(CONFIG_XIP_ROM_SIZE)
endif
## Calculate the base address of CBFS for later comparisons
@@ -181,9 +172,6 @@ else
$(eval $(call early_x86_stage,verstage,elf64-x86-64))
endif
-# Verstage on x86 expected to be xip.
-CBFSTOOL_VERSTAGE_OPTS = -a 64 --xip -S ".car.data"
-
endif # CONFIG_ARCH_VERSTAGE_X86_32 / CONFIG_ARCH_VERSTAGE_X86_64
###############################################################################
diff --git a/src/vendorcode/google/chromeos/vboot2/Makefile.inc b/src/vendorcode/google/chromeos/vboot2/Makefile.inc
index 86684057f2..fdb0d4e954 100644
--- a/src/vendorcode/google/chromeos/vboot2/Makefile.inc
+++ b/src/vendorcode/google/chromeos/vboot2/Makefile.inc
@@ -69,7 +69,15 @@ $(VB2_LIB): $(obj)/config.h
libverstage-srcs += $(VB2_LIB)
ifeq ($(CONFIG_SEPARATE_VERSTAGE),y)
-VERSTAGE_FILE = $(objcbfs)/verstage.elf
+cbfs-files-$(CONFIG_SEPARATE_VERSTAGE) += $(CONFIG_CBFS_PREFIX)/verstage
+$(CONFIG_CBFS_PREFIX)/verstage-file := $(objcbfs)/verstage.elf
+$(CONFIG_CBFS_PREFIX)/verstage-type := stage
+# Verstage on x86 expected to be xip.
+ifeq ($(CONFIG_ARCH_VERSTAGE_X86_32)$(CONFIG_ARCH_VERSTAGE_X86_64),y)
+$(CONFIG_CBFS_PREFIX)/verstage-options := -a 64 --xip -S ".car.data"
+
+endif
+
else
ifeq ($(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK),y)
bootblock-srcs += $(objgenerated)/libverstage.a