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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-04 16:15:50 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-04-20 06:14:06 +0000 |
| commit | 229d5b2f46af0c3c1472311c715c2191dfe7cbbd (patch) | |
| tree | 1d65602bd62bddc5aabe41fb36db6be88761ca59 /src | |
| parent | 101f45459629c545c4a491fcc56b9c8ddd3d7cc7 (diff) | |
| download | coreboot-229d5b2f46af0c3c1472311c715c2191dfe7cbbd.tar.xz | |
drivers/pc80/rtc: Move CMOS_POST_BANK_x definitions
Change-Id: I8b56df6de7529772b0f1a59002f92c4f31486bf0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38196
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/drivers/pc80/rtc/post.c | 28 | ||||
| -rw-r--r-- | src/include/pc80/mc146818rtc.h | 31 |
2 files changed, 28 insertions, 31 deletions
diff --git a/src/drivers/pc80/rtc/post.c b/src/drivers/pc80/rtc/post.c index 41a664e321..f993b96b2c 100644 --- a/src/drivers/pc80/rtc/post.c +++ b/src/drivers/pc80/rtc/post.c @@ -7,6 +7,34 @@ #include <pc80/mc146818rtc.h> #include <smp/spinlock.h> +#if CONFIG(USE_OPTION_TABLE) +# include "option_table.h" +# define CMOS_POST_OFFSET (CMOS_VSTART_cmos_post_offset >> 3) +#else +# if (CONFIG_CMOS_POST_OFFSET != 0) +# define CMOS_POST_OFFSET CONFIG_CMOS_POST_OFFSET +# else +# error "Must configure CONFIG_CMOS_POST_OFFSET" +# endif +#endif + +/* + * 0 = Bank Select Magic + * 1 = Bank 0 POST + * 2 = Bank 1 POST + * 3-6 = BANK 0 Extra log + * 7-10 = BANK 1 Extra log + */ +#define CMOS_POST_BANK_OFFSET (CMOS_POST_OFFSET) +#define CMOS_POST_BANK_0_MAGIC 0x80 +#define CMOS_POST_BANK_0_OFFSET (CMOS_POST_OFFSET + 1) +#define CMOS_POST_BANK_0_EXTRA (CMOS_POST_OFFSET + 3) +#define CMOS_POST_BANK_1_MAGIC 0x81 +#define CMOS_POST_BANK_1_OFFSET (CMOS_POST_OFFSET + 2) +#define CMOS_POST_BANK_1_EXTRA (CMOS_POST_OFFSET + 7) + +#define CMOS_POST_EXTRA_DEV_PATH 0x01 + DECLARE_SPIN_LOCK(cmos_post_lock) int cmos_post_previous_boot(u8 *code, u32 *extra) diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index edaeb1e4b2..353a09b416 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -181,37 +181,6 @@ int cmos_lb_cks_valid(void); int cmos_checksum_valid(int range_start, int range_end, int cks_loc); void cmos_set_checksum(int range_start, int range_end, int cks_loc); -#if CONFIG(CMOS_POST) -#if CONFIG(USE_OPTION_TABLE) -# include "option_table.h" -# define CMOS_POST_OFFSET (CMOS_VSTART_cmos_post_offset >> 3) -#else -# if (CONFIG_CMOS_POST_OFFSET != 0) -# define CMOS_POST_OFFSET CONFIG_CMOS_POST_OFFSET -# else -# error "Must configure CONFIG_CMOS_POST_OFFSET" -# endif -#endif - -/* - * 0 = Bank Select Magic - * 1 = Bank 0 POST - * 2 = Bank 1 POST - * 3-6 = BANK 0 Extra log - * 7-10 = BANK 1 Extra log - */ -#define CMOS_POST_BANK_OFFSET (CMOS_POST_OFFSET) -#define CMOS_POST_BANK_0_MAGIC 0x80 -#define CMOS_POST_BANK_0_OFFSET (CMOS_POST_OFFSET + 1) -#define CMOS_POST_BANK_0_EXTRA (CMOS_POST_OFFSET + 3) -#define CMOS_POST_BANK_1_MAGIC 0x81 -#define CMOS_POST_BANK_1_OFFSET (CMOS_POST_OFFSET + 2) -#define CMOS_POST_BANK_1_EXTRA (CMOS_POST_OFFSET + 7) - -#define CMOS_POST_EXTRA_DEV_PATH 0x01 - -#endif /* CONFIG_CMOS_POST */ - #endif /* CONFIG_ARCH_X86 */ void cmos_post_init(void); |