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authorStefan Reinauer <stepan@openbios.org>2005-09-08 17:17:25 +0000
committerStefan Reinauer <stepan@openbios.org>2005-09-08 17:17:25 +0000
commit246ae2129eb091da06cf6275bd503dd5730060dc (patch)
treeca9ecac57b496250a7d79f4b7d06df45ce76ca80 /src
parentafa190e046b2f45985c78d4550cc43f96764f33f (diff)
downloadcoreboot-246ae2129eb091da06cf6275bd503dd5730060dc.tar.xz
simplify code
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2012 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/cpu/emulation/qemu-i386/Config.lb (renamed from src/northbridge/emulation/qemu-i386/Config.lb)0
-rw-r--r--src/cpu/emulation/qemu-i386/chip.h6
-rw-r--r--src/cpu/emulation/qemu-i386/northbridge.c (renamed from src/northbridge/emulation/qemu-i386/northbridge.c)11
-rw-r--r--src/cpu/emulation/qemu-i386/northbridge.h (renamed from src/northbridge/emulation/qemu-i386/northbridge.h)0
-rw-r--r--src/mainboard/emulation/qemu-i386/Config.lb35
-rw-r--r--src/mainboard/emulation/qemu-i386/Options.lb168
-rw-r--r--src/mainboard/emulation/qemu-i386/chip.h1
-rw-r--r--src/northbridge/emulation/qemu-i386/chip.h5
8 files changed, 73 insertions, 153 deletions
diff --git a/src/northbridge/emulation/qemu-i386/Config.lb b/src/cpu/emulation/qemu-i386/Config.lb
index 4a0c2c8658..4a0c2c8658 100644
--- a/src/northbridge/emulation/qemu-i386/Config.lb
+++ b/src/cpu/emulation/qemu-i386/Config.lb
diff --git a/src/cpu/emulation/qemu-i386/chip.h b/src/cpu/emulation/qemu-i386/chip.h
new file mode 100644
index 0000000000..6ade17bb01
--- /dev/null
+++ b/src/cpu/emulation/qemu-i386/chip.h
@@ -0,0 +1,6 @@
+struct cpu_emulation_qemu_i386_config
+{
+};
+
+extern struct chip_operations cpu_emulation_qemu_i386_ops;
+
diff --git a/src/northbridge/emulation/qemu-i386/northbridge.c b/src/cpu/emulation/qemu-i386/northbridge.c
index dd120e29a5..2f1f48f995 100644
--- a/src/northbridge/emulation/qemu-i386/northbridge.c
+++ b/src/cpu/emulation/qemu-i386/northbridge.c
@@ -119,7 +119,16 @@ static void enable_dev(struct device *dev)
}
}
-struct chip_operations northbridge_emulation_qemu_i386_ops = {
+struct chip_operations cpu_emulation_qemu_i386_ops = {
CHIP_NAME("QEMU Northbridge")
.enable_dev = enable_dev,
};
+
+void udelay(int usecs)
+{
+ int i;
+ for(i = 0; i < usecs; i++)
+ outb(i&0xff, 0x80);
+}
+
+
diff --git a/src/northbridge/emulation/qemu-i386/northbridge.h b/src/cpu/emulation/qemu-i386/northbridge.h
index c74e63b97d..c74e63b97d 100644
--- a/src/northbridge/emulation/qemu-i386/northbridge.h
+++ b/src/cpu/emulation/qemu-i386/northbridge.h
diff --git a/src/mainboard/emulation/qemu-i386/Config.lb b/src/mainboard/emulation/qemu-i386/Config.lb
index c6655d9294..8b1e12010d 100644
--- a/src/mainboard/emulation/qemu-i386/Config.lb
+++ b/src/mainboard/emulation/qemu-i386/Config.lb
@@ -2,8 +2,11 @@
## Compute the location and size of where this firmware image
## (linuxBIOS plus bootloader) will live in the boot rom chip.
##
+default ROM_SIZE = 256 * 1024
+default FALLBACK_SIZE = 128*1024
+
if USE_FALLBACK_IMAGE
- default ROM_SECTION_SIZE = FALLBACK_SIZE
+ default ROM_SECTION_SIZE = 128 * 1024 # FALLBACK_SIZE
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
else
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
@@ -29,19 +32,22 @@ default _ROMBASE = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
## XIP_ROM_SIZE must be a power of 2.
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
##
-default XIP_ROM_SIZE=65536
+default XIP_ROM_SIZE=32*1024
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
-arch i386 end
+##
+## Set all of the defaults for an x86 architecture
+##
+
+arch i386 end
##
## Build the objects we have code for in this directory.
##
driver mainboard.o
-if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
-#object reset.o
+object reset.o
##
## Romcc output
@@ -58,11 +64,11 @@ end
makerule ./auto.E
depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
- action "./romcc -E -mcpu=i386 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+ action "./romcc -E -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
end
makerule ./auto.inc
depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
- action "./romcc -mcpu=i386 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+ action "./romcc -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
end
##
@@ -111,11 +117,7 @@ end
## Setup RAM
##
mainboardinit cpu/x86/fpu/enable_fpu.inc
-#mainboardinit cpu/x86/mmx/enable_mmx.inc # emulators dont do mmx+sse
-#mainboardinit cpu/x86/sse/enable_sse.inc
mainboardinit ./auto.inc
-#mainboardinit cpu/x86/sse/disable_sse.inc
-#mainboardinit cpu/x86/mmx/disable_mmx.inc
##
## Include the secondary Configuration files
@@ -123,8 +125,11 @@ mainboardinit ./auto.inc
dir /pc80
config chip.h
-chip northbridge/emulation/qemu-i386
- device pci_domain 0 on
- end
+chip cpu/emulation/qemu-i386
+ device pci_domain 0 on
+ device pci 0.0 on end
+ device pci 1.0 on end
+# register "com1" = "{1}"
+# register "com1" = "{1, 0, 0x3f8, 4}"
+ end
end
-
diff --git a/src/mainboard/emulation/qemu-i386/Options.lb b/src/mainboard/emulation/qemu-i386/Options.lb
index d12a1c3592..27982ce4fb 100644
--- a/src/mainboard/emulation/qemu-i386/Options.lb
+++ b/src/mainboard/emulation/qemu-i386/Options.lb
@@ -3,66 +3,61 @@ uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses HAVE_HARD_RESET
-uses IRQ_SLOT_COUNT
uses HAVE_OPTION_TABLE
-uses CONFIG_MAX_CPUS
-uses CONFIG_IOAPIC
-uses CONFIG_SMP
+uses USE_OPTION_TABLE
+uses CONFIG_COMPRESS
+uses CONFIG_ROM_STREAM
+uses IRQ_SLOT_COUNT
+uses MAINBOARD
+uses MAINBOARD_VENDOR
+uses MAINBOARD_PART_NUMBER
+uses LINUXBIOS_EXTRA_VERSION
+uses ARCH
uses FALLBACK_SIZE
+uses STACK_SIZE
+uses HEAP_SIZE
uses ROM_SIZE
uses ROM_SECTION_SIZE
uses ROM_IMAGE_SIZE
uses ROM_SECTION_SIZE
uses ROM_SECTION_OFFSET
-uses CONFIG_ROM_STREAM
uses CONFIG_ROM_STREAM_START
uses PAYLOAD_SIZE
uses _ROMBASE
+uses _RAMBASE
uses XIP_ROM_SIZE
uses XIP_ROM_BASE
-uses STACK_SIZE
-uses HEAP_SIZE
-uses USE_OPTION_TABLE
-uses LB_CKS_RANGE_START
-uses LB_CKS_RANGE_END
-uses LB_CKS_LOC
-uses MAINBOARD
-uses MAINBOARD_PART_NUMBER
-uses MAINBOARD_VENDOR
-uses LINUXBIOS_EXTRA_VERSION
-uses _RAMBASE
-uses TTYS0_BAUD
-uses TTYS0_BASE
-uses TTYS0_LCS
-uses DEFAULT_CONSOLE_LOGLEVEL
-uses MAXIMUM_CONSOLE_LOGLEVEL
-uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
-uses CONFIG_CONSOLE_SERIAL8250
-uses HAVE_INIT_TIMER
-uses CONFIG_GDB_STUB
+uses HAVE_MP_TABLE
uses CROSS_COMPILE
uses CC
uses HOSTCC
uses OBJCOPY
+uses CONFIG_CONSOLE_SERIAL8250
+
+
+uses DEFAULT_CONSOLE_LOGLEVEL
+uses MAXIMUM_CONSOLE_LOGLEVEL
+
+default CONFIG_CONSOLE_SERIAL8250=1
+default DEFAULT_CONSOLE_LOGLEVEL=8
+default MAXIMUM_CONSOLE_LOGLEVEL=8
+## ROM_SIZE is the size of boot ROM that this board will use.
+default ROM_SIZE = 256*1024
+
###
### Build options
###
##
-## ROM_SIZE is the size of boot ROM that this board will use.
-##
-default ROM_SIZE=0x40000
-
-##
-## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
+## Build code for the fallback boot
##
-default FALLBACK_SIZE=0x40000
+default HAVE_FALLBACK_BOOT=1
##
-## Build code for the fallback boot
+## no MP table
##
-default HAVE_FALLBACK_BOOT=1
+default HAVE_MP_TABLE=0
##
## Build code to reset the motherboard from linuxBIOS
@@ -73,51 +68,21 @@ default HAVE_HARD_RESET=0
## Build code to export a programmable irq routing table
##
default HAVE_PIRQ_TABLE=0
-default IRQ_SLOT_COUNT=9
-
-##
-## Build code to export an x86 MP table
-## Useful for specifying IRQ routing values
-##
-default HAVE_MP_TABLE=0
+default IRQ_SLOT_COUNT=5
+#object irq_tables.o
##
## Build code to export a CMOS option table
##
default HAVE_OPTION_TABLE=1
-##
-## Move the default LinuxBIOS cmos range off of AMD RTC registers
-##
-default LB_CKS_RANGE_START=49
-default LB_CKS_RANGE_END=122
-default LB_CKS_LOC=123
-
-##
-## Build code for SMP support
-## Only worry about 2 micro processors
-##
-default CONFIG_SMP=0
-default CONFIG_MAX_CPUS=2
-
-##
-## Build code to setup a generic IOAPIC
-##
-default CONFIG_IOAPIC=1
-
-##
-## Clean up the motherboard id strings
-##
-default MAINBOARD_PART_NUMBER="x86"
-default MAINBOARD_VENDOR="QEMU"
-
-
###
### LinuxBIOS layout values
###
## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
default ROM_IMAGE_SIZE = 65536
+default FALLBACK_SIZE = 131072
##
## Use a small 8K stack
@@ -132,21 +97,12 @@ default HEAP_SIZE=0x4000
##
## Only use the option table in a normal image
##
-default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
+#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
+default USE_OPTION_TABLE = 0
-##
-## LinuxBIOS C code runs at this location in RAM
-##
-default _RAMBASE=0x00004000
+default _RAMBASE = 0x00004000
-##
-## Load the payload from the ROM
-##
-default CONFIG_ROM_STREAM = 1
-
-###
-### Defaults of options that you may want to override in the target config file
-###
+default CONFIG_ROM_STREAM = 1
##
## The default compiler
@@ -154,56 +110,6 @@ default CONFIG_ROM_STREAM = 1
default CC="$(CROSS_COMPILE)gcc -m32"
default HOSTCC="gcc"
-##
-## Disable the gdb stub by default
-##
-default CONFIG_GDB_STUB=0
-
-##
-## The Serial Console
-##
-
-# To Enable the Serial Console
-default CONFIG_CONSOLE_SERIAL8250=1
-
-## Select the serial console baud rate
-default TTYS0_BAUD=115200
-#default TTYS0_BAUD=57600
-#default TTYS0_BAUD=38400
-#default TTYS0_BAUD=19200
-#default TTYS0_BAUD=9600
-#default TTYS0_BAUD=4800
-#default TTYS0_BAUD=2400
-#default TTYS0_BAUD=1200
-
-# Select the serial console base port
-default TTYS0_BASE=0x3f8
-
-# Select the serial protocol
-# This defaults to 8 data bits, 1 stop bit, and no parity
-default TTYS0_LCS=0x3
-
-##
-### Select the linuxBIOS loglevel
-##
-## EMERG 1 system is unusable
-## ALERT 2 action must be taken immediately
-## CRIT 3 critical conditions
-## ERR 4 error conditions
-## WARNING 5 warning conditions
-## NOTICE 6 normal but significant condition
-## INFO 7 informational
-## DEBUG 8 debug-level messages
-## SPEW 9 Way too many details
-
-## Request this level of debugging output
-default DEFAULT_CONSOLE_LOGLEVEL=9
-## At a maximum only compile in this level of debugging
-default MAXIMUM_CONSOLE_LOGLEVEL=9
+end
-##
-## Select power on after power fail setting
-default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
-### End Options.lb
-end
diff --git a/src/mainboard/emulation/qemu-i386/chip.h b/src/mainboard/emulation/qemu-i386/chip.h
index 51e37b1bc3..3aae25c769 100644
--- a/src/mainboard/emulation/qemu-i386/chip.h
+++ b/src/mainboard/emulation/qemu-i386/chip.h
@@ -1,5 +1,4 @@
extern struct chip_operations mainboard_emulation_qemu_i386_ops;
struct mainboard_emulation_qemu_i386_config {
- int nothing;
};
diff --git a/src/northbridge/emulation/qemu-i386/chip.h b/src/northbridge/emulation/qemu-i386/chip.h
deleted file mode 100644
index 891c6cc448..0000000000
--- a/src/northbridge/emulation/qemu-i386/chip.h
+++ /dev/null
@@ -1,5 +0,0 @@
-struct northbridge_emulation_qemu_i386_config
-{
-};
-
-extern struct chip_operations northbridge_emulation_qemu_i386_ops;