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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-15 14:28:23 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-11-28 07:45:17 +0100 |
| commit | 24d875bddc5812b3b9041f557019fea14a71ebe7 (patch) | |
| tree | 88cc4158b9b7b94d1570a1f6326fc1beeefe8de1 /src | |
| parent | 58b532d586238abfa19d49f1c4e6d64908a4361c (diff) | |
| download | coreboot-24d875bddc5812b3b9041f557019fea14a71ebe7.tar.xz | |
ACPI: Remove CBMEM TOC from GNVS
This existed for ChromeOS but was no longer used with DYNAMIC_CBMEM.
See commit a0b4a8d.
Change-Id: Iae82498ab729df5682d89e66bb9de96457e91619
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7465
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/intel/mohonpeak/acpi_tables.c | 3 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/broadwell/nvs.h | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_rangeley/nvs.h | 2 |
3 files changed, 2 insertions, 5 deletions
diff --git a/src/mainboard/intel/mohonpeak/acpi_tables.c b/src/mainboard/intel/mohonpeak/acpi_tables.c index b49da65352..84f0083958 100644 --- a/src/mainboard/intel/mohonpeak/acpi_tables.c +++ b/src/mainboard/intel/mohonpeak/acpi_tables.c @@ -54,9 +54,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs) gnvs->s5u0 = 1; gnvs->s5u1 = 1; - /* CBMEM TOC */ - gnvs->cmem = (u32)get_cbmem_toc(); - /* IGD Displays */ gnvs->ndid = 3; gnvs->did[0] = 0x80000100; diff --git a/src/soc/intel/broadwell/broadwell/nvs.h b/src/soc/intel/broadwell/broadwell/nvs.h index df36a03806..398e0a266e 100644 --- a/src/soc/intel/broadwell/broadwell/nvs.h +++ b/src/soc/intel/broadwell/broadwell/nvs.h @@ -50,7 +50,7 @@ typedef struct { u8 s33g; /* 0x16 - Enable 3G in S3 */ u8 lids; /* 0x17 - LID State */ u8 pwrs; /* 0x18 - AC Power State */ - u32 cmem; /* 0x19 - 0x1c - CBMEM TOC */ + u32 obsolete_cmem; /* 0x19 - 0x1c - CBMEM TOC */ u32 cbmc; /* 0x1d - 0x20 - Coreboot Memory Console */ u32 pm1i; /* 0x21 - 0x24 - PM1 wake status bit */ u8 rsvd3[219]; diff --git a/src/southbridge/intel/fsp_rangeley/nvs.h b/src/southbridge/intel/fsp_rangeley/nvs.h index 6578bbf189..97362eab4b 100644 --- a/src/southbridge/intel/fsp_rangeley/nvs.h +++ b/src/southbridge/intel/fsp_rangeley/nvs.h @@ -71,7 +71,7 @@ typedef struct { u8 s3u0; /* 0x35 - Enable USB0 in S3 */ u8 s3u1; /* 0x36 - Enable USB1 in S3 */ u8 s33g; /* 0x37 - Enable S3 in 3G */ - u32 cmem; /* 0x38 - CBMEM TOC */ + u32 obsolete_cmem; /* 0x38 - CBMEM TOC */ /* Integrated Graphics Device */ u8 igds; /* 0x3c - IGD state */ u8 tlst; /* 0x3d - Display Toggle List Pointer */ |