diff options
| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2013-11-13 15:37:11 -0800 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-07 12:05:49 +0200 |
| commit | 281abfb2dbf138bd732404f4412d8c6bee611bee (patch) | |
| tree | e1546b17dffa9803a89e761f1d8c799c493a51de /src | |
| parent | afaaa3a618ea677f20c9db75d09e311db0197906 (diff) | |
| download | coreboot-281abfb2dbf138bd732404f4412d8c6bee611bee.tar.xz | |
baytrail: gpio: Make pad input/output state mutually exclusive
Previously pads were being configured as both input and output
simultaneously due to the config bits being active low. Create new
defines that only enable either input or output, and use them in our
GPIO configs.
BUG=chrome-os-partner:22863
TEST=Manual on Rambi. Verify system boots and peripherals still
function.
BRANCH=None.
Change-Id: If386682a3d810864b7b9f5d2aecdb2e6cfceea86
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176725
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4971
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/baytrail/baytrail/gpio.h | 24 |
1 files changed, 14 insertions, 10 deletions
diff --git a/src/soc/intel/baytrail/baytrail/gpio.h b/src/soc/intel/baytrail/baytrail/gpio.h index 154ac84390..bdb33f1d75 100644 --- a/src/soc/intel/baytrail/baytrail/gpio.h +++ b/src/soc/intel/baytrail/baytrail/gpio.h @@ -143,13 +143,17 @@ #define PAD_VAL_OUTPUT_DISABLE (1 << 1) #define PAD_VAL_OUTPUT_ENABLE (0 << 1) +/* Input / Output state should usually be mutually exclusive */ +#define PAD_VAL_INPUT (PAD_VAL_INPUT_ENABLE | PAD_VAL_OUTPUT_DISABLE) +#define PAD_VAL_OUTPUT (PAD_VAL_OUTPUT_ENABLE | PAD_VAL_INPUT_DISABLE) + /* pad_val[0] - Value */ #define PAD_VAL_HIGH (1 << 0) #define PAD_VAL_LOW (0 << 0) /* pad_val reg power-on default varies by pad, and apparently can cause issues * if not set correctly, even if the pin isn't configured as GPIO. */ -#define PAD_VAL_DEFAULT (PAD_VAL_INPUT_ENABLE | PAD_VAL_OUTPUT_DISABLE) +#define PAD_VAL_DEFAULT PAD_VAL_INPUT /* Configure GPIOs as legacy by default. GPNCORE doesn't support * legacy config -- so also configure the pad regs as GPIO. We rely upon @@ -158,7 +162,7 @@ { .pad_conf0 = PAD_PU_10K | PAD_PULL_UP | PAD_CONFIG0_DEFAULT \ | PAD_FUNC0, \ .pad_conf1 = PAD_CONFIG1_DEFAULT, \ - .pad_val = PAD_VAL_INPUT_ENABLE, \ + .pad_val = PAD_VAL_INPUT, \ .use_sel = GPIO_USE_LEGACY, \ .io_sel = GPIO_DIR_INPUT } @@ -166,7 +170,7 @@ { .pad_conf0 = PAD_PU_10K | PAD_PULL_DOWN | PAD_CONFIG0_DEFAULT \ | PAD_FUNC0, \ .pad_conf1 = PAD_CONFIG1_DEFAULT, \ - .pad_val = PAD_VAL_INPUT_ENABLE, \ + .pad_val = PAD_VAL_INPUT, \ .use_sel = GPIO_USE_LEGACY, \ .io_sel = GPIO_DIR_INPUT } @@ -174,7 +178,7 @@ { .pad_conf0 = PAD_PU_10K | PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT \ | PAD_FUNC0, \ .pad_conf1 = PAD_CONFIG1_DEFAULT, \ - .pad_val = PAD_VAL_INPUT_ENABLE, \ + .pad_val = PAD_VAL_INPUT, \ .use_sel = GPIO_USE_LEGACY, \ .io_sel = GPIO_DIR_INPUT } @@ -183,7 +187,7 @@ { .pad_conf0 = PAD_PU_10K | PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT \ | PAD_FUNC0 | PAD_IRQ_EN | PAD_TNE_IRQ, \ .pad_conf1 = PAD_CONFIG1_DEFAULT, \ - .pad_val = PAD_VAL_INPUT_ENABLE, \ + .pad_val = PAD_VAL_INPUT, \ .use_sel = GPIO_USE_LEGACY, \ .io_sel = GPIO_DIR_INPUT, \ .tne = GPIO_NEDGE_ENABLE } @@ -193,7 +197,7 @@ { .pad_conf0 = PAD_PU_10K | PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT \ | PAD_FUNC0 | PAD_IRQ_EN | PAD_TPE_IRQ, \ .pad_conf1 = PAD_CONFIG1_DEFAULT, \ - .pad_val = PAD_VAL_INPUT_ENABLE, \ + .pad_val = PAD_VAL_INPUT, \ .use_sel = GPIO_USE_LEGACY, \ .io_sel = GPIO_DIR_INPUT, \ .tne = GPIO_PEDGE_ENABLE } @@ -202,7 +206,7 @@ { .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT \ | PAD_FUNC0, \ .pad_conf1 = PAD_CONFIG1_DEFAULT, \ - .pad_val = PAD_VAL_OUTPUT_ENABLE | PAD_VAL_LOW, \ + .pad_val = PAD_VAL_OUTPUT | PAD_VAL_LOW, \ .use_sel = GPIO_USE_LEGACY, \ .io_sel = GPIO_DIR_OUTPUT, \ .gp_lvl = GPIO_LEVEL_LOW } @@ -211,7 +215,7 @@ { .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT \ | PAD_FUNC0, \ .pad_conf1 = PAD_CONFIG1_DEFAULT, \ - .pad_val = PAD_VAL_OUTPUT_ENABLE | PAD_VAL_HIGH, \ + .pad_val = PAD_VAL_OUTPUT | PAD_VAL_HIGH, \ .use_sel = GPIO_USE_LEGACY, \ .io_sel = GPIO_DIR_OUTPUT, \ .gp_lvl = GPIO_LEVEL_HIGH } @@ -238,7 +242,7 @@ #define GPIO_ACPI_SCI \ { .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT | PAD_FUNC0, \ .pad_conf1 = PAD_CONFIG1_DEFAULT, \ - .pad_val = PAD_VAL_INPUT_ENABLE, \ + .pad_val = PAD_VAL_INPUT, \ .use_sel = GPIO_USE_LEGACY, \ .io_sel = GPIO_DIR_INPUT, \ .tne = 1, \ @@ -246,7 +250,7 @@ #define GPIO_ACPI_SMI \ { .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT | PAD_FUNC0, \ .pad_conf1 = PAD_CONFIG1_DEFAULT, \ - .pad_val = PAD_VAL_INPUT_ENABLE, \ + .pad_val = PAD_VAL_INPUT, \ .use_sel = GPIO_USE_LEGACY, \ .io_sel = GPIO_DIR_INPUT, \ .tne = 1, \ |