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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2018-07-12 13:07:04 +0200 |
|---|---|---|
| committer | Patrick Rudolph <siro@das-labor.org> | 2018-07-17 08:05:01 +0000 |
| commit | 4461613119a04f86899a7423658f91b2fe10125b (patch) | |
| tree | 3bd0f30ea29987e12aad7aaba74a2e3ae22bfef2 /src | |
| parent | 2531865f137fed1254c7d6702904b37a537884a4 (diff) | |
| download | coreboot-4461613119a04f86899a7423658f91b2fe10125b.tar.xz | |
cavium/bdk: Fix coverity and remove hardcoded DRAM speed
* Fix CID1393963 (Uninitialized variables)
* Comment in working code
* Remove workaround to limit DDR speed
Change-Id: I96289da43c1018c2fdf9d013ce7f21d7511ba595
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27452
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/cavium/cn8100_sff_evb/bdk_devicetree.c | 1 | ||||
| -rw-r--r-- | src/vendorcode/cavium/bdk/libdram/dram-spd.c | 8 |
2 files changed, 5 insertions, 4 deletions
diff --git a/src/mainboard/cavium/cn8100_sff_evb/bdk_devicetree.c b/src/mainboard/cavium/cn8100_sff_evb/bdk_devicetree.c index 7bc04ce01e..8775886263 100644 --- a/src/mainboard/cavium/cn8100_sff_evb/bdk_devicetree.c +++ b/src/mainboard/cavium/cn8100_sff_evb/bdk_devicetree.c @@ -90,7 +90,6 @@ const struct bdk_devicetree_key_value devtree[] = { {"MULTI-NODE", "0"}, {"QLM-AUTO-CONFIG", "0"}, {"QLM-DIP-AUTO-CONFIG", "1"}, -{"DDR-SPEED.N0", "1333"}, {"DDR-CONFIG-SPD-ADDR.DIMM0.LMC0", "0x1050"}, {"USB-PWR-GPIO.N0.PORT0", "12"}, {"USB-PWR-GPIO-POLARITY.N0.PORT0", "0"}, diff --git a/src/vendorcode/cavium/bdk/libdram/dram-spd.c b/src/vendorcode/cavium/bdk/libdram/dram-spd.c index 6498b85f2e..329ae98901 100644 --- a/src/vendorcode/cavium/bdk/libdram/dram-spd.c +++ b/src/vendorcode/cavium/bdk/libdram/dram-spd.c @@ -549,15 +549,17 @@ dram_get_default_spd_speed(bdk_node_t node, const ddr_configuration_t *ddr_confi int dimm_speed[8], dimm_count = 0; int dimms_per_lmc = 0; + memset (dimm_speed, 0, sizeof(dimm_speed)); + for (lmc = 0; lmc < 4; lmc++) { for (dimm = 0; dimm < DDR_CFG_T_MAX_DIMMS; dimm++) { const dimm_config_t *dimm_config = &ddr_config[lmc].dimm_config_table[dimm]; - if (/*dimm_config->spd_addr ||*/ dimm_config->spd_ptr) + if (dimm_config->spd_addr || dimm_config->spd_ptr) { speed = (ddr_type == DDR4_DRAM) ? get_ddr4_spd_speed(node, dimm_config) : get_ddr3_spd_speed(node, dimm_config); - //printf("N%d.LMC%d.DIMM%d: SPD speed %d\n", node, lmc, dimm, speed); + printf("N%d.LMC%d.DIMM%d: SPD speed %d\n", node, lmc, dimm, speed); dimm_speed[dimm_count] = speed; dimm_count++; if (lmc == 0) @@ -596,6 +598,6 @@ dram_get_default_spd_speed(bdk_node_t node, const ddr_configuration_t *ddr_confi ret_speed = mts_to_hertz(speed); finish_up: - //printf("N%d: Returning default SPD speed %d\n", node, ret_speed); + printf("N%d: Returning default SPD speed %d\n", node, ret_speed); return ret_speed; } |