Remove motorola PPC boards. These have lain untouched and unused by anyone

for years. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

24 files changed, 0 insertions, 1317 deletions

diff --git a/src/config/Options.lb b/src/config/Options.lb
index c54f783181..db1a20fa91 100644
--- a/src/config/Options.lb
+++ b/src/config/Options.lb
@@ -1225,49 +1225,3 @@ define CONFIG_PCIE_CONFIGSPACE_HOLE
 	comment "Leave a hole for PCIe config space in the device allocator"
 end
 
-###############################################
-# Board specific options
-###############################################
-
-###############################################
-# Options for motorola/sandpoint
-###############################################
-define CONFIG_SANDPOINT_ALTIMUS
-	default 0
-	export never
-	comment "Configure Sandpoint with Altimus PMC"
-end
-define CONFIG_SANDPOINT_TALUS
-	default 0
-	export never
-	comment "Configure Sandpoint with Talus PMC"
-end
-define CONFIG_SANDPOINT_UNITY
-	default 0
-	export never
-	comment "Configure Sandpoint with Unity PMC"
-end
-define CONFIG_SANDPOINT_VALIS
-	default 0
-	export never
-	comment "Configure Sandpoint with Valis PMC"
-end
-define CONFIG_SANDPOINT_GYRUS
-	default 0
-	export never
-	comment "Configure Sandpoint with Gyrus PMC"
-end
-
-###############################################
-# Options for totalimpact/briq
-###############################################
-define CONFIG_BRIQ_750FX
-	default 0
-	export never
-	comment "Configure briQ with PowerPC 750FX"
-end
-define CONFIG_BRIQ_7400
-	default 0
-	export never
-	comment "Configure briQ with PowerPC G4"
-end
diff --git a/src/mainboard/Kconfig b/src/mainboard/Kconfig
index 2837cb5128..751eddac78 100644
--- a/src/mainboard/Kconfig
+++ b/src/mainboard/Kconfig
@@ -62,8 +62,6 @@ config VENDOR_LIPPERT
 	bool "Lippert"
 config VENDOR_MITAC
 	bool "Mitac"
-config VENDOR_MOTOROLA
-	bool "Motorola"
 config VENDOR_MSI
 	bool "MSI"
 config VENDOR_NEC
@@ -246,11 +244,6 @@ config MAINBOARD_VENDOR
 
 config MAINBOARD_VENDOR
 	string
-	default "Motorola"
-	depends on VENDOR_MOTOROLA
-
-config MAINBOARD_VENDOR
-	string
 	default "MSI"
 	depends on VENDOR_MSI
 
diff --git a/src/mainboard/motorola/Kconfig b/src/mainboard/motorola/Kconfig
deleted file mode 100644
index 792d600548..0000000000
--- a/src/mainboard/motorola/Kconfig
+++ /dev/null
@@ -1 +0,0 @@
-#
diff --git a/src/mainboard/motorola/sandpoint/Config.lb b/src/mainboard/motorola/sandpoint/Config.lb
deleted file mode 100644
index 5ed46bd3b7..0000000000
--- a/src/mainboard/motorola/sandpoint/Config.lb
+++ /dev/null
@@ -1,30 +0,0 @@
-##
-## Config file for the Motorola Sandpoint III development system.
-## Note that this has only been tested with the Altimus 7410 PMC.
-##
-
-##
-## Early board initialization, called from ppc_main()
-##
-initobject init.o
-initobject clock.o
-
-##
-## Stage 2 timer support
-##
-object clock.o
-
-##
-## Set our CONFIG_ARCH
-##
-arch ppc end
-
-##
-## Build the objects we have code for in this directory.
-##
-
-dir nvram
-dir flash
-
-addaction coreboot.a "$(CONFIG_CROSS_COMPILE)ranlib coreboot.a"
-makedefine CFLAGS += -g
diff --git a/src/mainboard/motorola/sandpoint/Options.lb b/src/mainboard/motorola/sandpoint/Options.lb
deleted file mode 100644
index 29cc5b96af..0000000000
--- a/src/mainboard/motorola/sandpoint/Options.lb
+++ /dev/null
@@ -1,134 +0,0 @@
-uses CONFIG_SANDPOINT_ALTIMUS
-uses CONFIG_CBFS
-uses CONFIG_ARCH_X86
-uses CONFIG_SANDPOINT_TALUS
-uses CONFIG_SANDPOINT_UNITY
-uses CONFIG_SANDPOINT_VALIS
-uses CONFIG_SANDPOINT_GYRUS
-uses CONFIG_ISA_IO_BASE
-uses CONFIG_ISA_MEM_BASE
-uses CONFIG_PCIC0_CFGADDR
-uses CONFIG_PCIC0_CFGDATA
-uses CONFIG_PNP_CFGADDR
-uses CONFIG_PNP_CFGDATA
-uses CONFIG_IO_BASE
-
-uses CONFIG_CROSS_COMPILE 
-uses CONFIG_HAVE_OPTION_TABLE
-uses CONFIG_SANDPOINT_ALTIMUS 
-uses CONFIG_COMPRESS 
-uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL 
-uses CONFIG_USE_INIT
-uses CONFIG_CHIP_CONFIGURE
-uses CONFIG_NO_POST
-uses CONFIG_CONSOLE_SERIAL8250 
-uses CONFIG_TTYS0_BASE 
-uses CONFIG_IDE
-uses CONFIG_FS_PAYLOAD 
-uses CONFIG_FS_EXT2
-uses CONFIG_FS_ISO9660
-uses CONFIG_FS_FAT
-uses CONFIG_AUTOBOOT_CMDLINE
-uses CONFIG_PAYLOAD_SIZE
-uses CONFIG_ROM_SIZE
-uses CONFIG_ROM_IMAGE_SIZE
-uses CONFIG_RESET
-uses CONFIG_EXCEPTION_VECTORS
-uses CONFIG_ROMBASE
-uses CONFIG_ROMSTART
-uses CONFIG_RAMBASE
-uses CONFIG_RAMSTART
-uses CONFIG_STACK_SIZE
-uses CONFIG_HEAP_SIZE
-
-uses CONFIG_MAINBOARD
-uses CONFIG_MAINBOARD_VENDOR
-uses CONFIG_MAINBOARD_PART_NUMBER
-uses COREBOOT_EXTRA_VERSION
-uses CONFIG_CROSS_COMPILE
-uses CC
-uses HOSTCC
-uses CONFIG_OBJCOPY
-
-##
-## Set memory map
-##
-default CONFIG_ISA_IO_BASE=0xfe000000
-default CONFIG_ISA_MEM_BASE=0xfd000000
-default CONFIG_PCIC0_CFGADDR=0xfec00000
-default CONFIG_PCIC0_CFGDATA=0xfee00000
-default CONFIG_PNP_CFGADDR=0x15c
-default CONFIG_PNP_CFGDATA=0x15d
-default CONFIG_IO_BASE=CONFIG_ISA_IO_BASE
-
-##
-## The default compiler
-##
-default CC="$(CONFIG_CROSS_COMPILE)gcc"
-default HOSTCC="gcc"
-## use a cross compiler
-#default CONFIG_CROSS_COMPILE="powerpc-eabi-"
-#default CONFIG_CROSS_COMPILE="ppc_74xx-"
-default CONFIG_ARCH_X86=0
-
-## Use stage 1 initialization code
-default CONFIG_USE_INIT=1
-
-## Use static configuration
-default CONFIG_CHIP_CONFIGURE=1
-
-## We don't use compressed image
-default CONFIG_COMPRESS=0
-
-## Turn off POST codes
-default CONFIG_NO_POST=1
-
-## Enable serial console
-default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
-default CONFIG_CONSOLE_SERIAL8250=1
-default CONFIG_TTYS0_BASE=0x3f8
-
-## Load payload using filo
-default CONFIG_IDE=1
-default CONFIG_FS_PAYLOAD=1
-default CONFIG_FS_EXT2=1
-default CONFIG_FS_ISO9660=1
-default CONFIG_FS_FAT=1
-default CONFIG_AUTOBOOT_CMDLINE="hdc1:/vmlinuz"
-
-# coreboot must fit into 128KB
-default CONFIG_ROM_IMAGE_SIZE=131072
-default CONFIG_ROM_SIZE={CONFIG_ROM_IMAGE_SIZE+CONFIG_PAYLOAD_SIZE}
-default CONFIG_PAYLOAD_SIZE=262144
-
-# Set stack and heap sizes (stage 2)
-default CONFIG_STACK_SIZE=0x10000
-default CONFIG_HEAP_SIZE=0x10000
-
-# Sandpoint Demo Board
-## Base of ROM
-default CONFIG_ROMBASE=0xfff00000
-
-## Sandpoint reset vector
-default CONFIG_RESET=CONFIG_ROMBASE+0x100
-
-## Exception vectors (other than reset vector)
-default CONFIG_EXCEPTION_VECTORS=CONFIG_RESET+0x100
-
-## Start of coreboot in the boot rom
-## = CONFIG_RESET + exeception vector table size
-default CONFIG_ROMSTART=CONFIG_RESET+0x3100
-
-## Coreboot C code runs at this location in RAM
-default CONFIG_RAMBASE=0x00100000
-default CONFIG_RAMSTART=0x00100000
-
-default CONFIG_SANDPOINT_ALTIMUS=1
-
-### End Options.lb
-#
-# CBFS
-#
-#
-default CONFIG_CBFS=1
-end
diff --git a/src/mainboard/motorola/sandpoint/STATUS b/src/mainboard/motorola/sandpoint/STATUS
deleted file mode 100644
index 1f528e38da..0000000000
--- a/src/mainboard/motorola/sandpoint/STATUS
+++ /dev/null
@@ -1,27 +0,0 @@
-# These are keyword-value pairs. 
-# a : separates the keyword from the value 
-# the value is arbitrary text delimited by newline. 
-# continuation, if needed, will be via the \ at the end of a line
-# comments are indicated by a '#' as the first character. 
-# the keywords are case-INSENSITIVE
-owner:	Greg Watson
-email:	gwatson@lanl.gov
-#status: One of unsupported, unstable, stable
-status: unstable
-explanation: currently under development
-flash-types: 
-payload-types: 
-# e.g. linux, plan 9, wince, etc.
-OS-types: linux
-# e.g. "Plan 9 interrupts don't work on this chipset"
-OS-issues:
-console-types: serial
-# vga is unsupported, unstable, or stable
-vga: unsupported
-# Last-known-good follows the internationl date standard: day/month/year
-last-known-good: 19/04/2003
-Comments: 
-Links:
-Mainboard-revision: 
-# What other mainboards are like this one? List them here. 
-AKA: 
diff --git a/src/mainboard/motorola/sandpoint/abuild.info b/src/mainboard/motorola/sandpoint/abuild.info
deleted file mode 100644
index 0fb40a344d..0000000000
--- a/src/mainboard/motorola/sandpoint/abuild.info
+++ /dev/null
@@ -1,3 +0,0 @@
-# This mainboard directory can't be built without 
-# an extra set of config files.
-TARCH=SKIP
diff --git a/src/mainboard/motorola/sandpoint/clock.c b/src/mainboard/motorola/sandpoint/clock.c
deleted file mode 100644
index 216bb7aeb2..0000000000
--- a/src/mainboard/motorola/sandpoint/clock.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#include <ppc.h>
-
-unsigned long get_timer_freq(void)
-{
-    return 100000000 / 4;
-}
-
diff --git a/src/mainboard/motorola/sandpoint/devicetree.cb b/src/mainboard/motorola/sandpoint/devicetree.cb
deleted file mode 100644
index 5ed46bd3b7..0000000000
--- a/src/mainboard/motorola/sandpoint/devicetree.cb
+++ /dev/null
@@ -1,30 +0,0 @@
-##
-## Config file for the Motorola Sandpoint III development system.
-## Note that this has only been tested with the Altimus 7410 PMC.
-##
-
-##
-## Early board initialization, called from ppc_main()
-##
-initobject init.o
-initobject clock.o
-
-##
-## Stage 2 timer support
-##
-object clock.o
-
-##
-## Set our CONFIG_ARCH
-##
-arch ppc end
-
-##
-## Build the objects we have code for in this directory.
-##
-
-dir nvram
-dir flash
-
-addaction coreboot.a "$(CONFIG_CROSS_COMPILE)ranlib coreboot.a"
-makedefine CFLAGS += -g
diff --git a/src/mainboard/motorola/sandpoint/flash.h b/src/mainboard/motorola/sandpoint/flash.h
deleted file mode 100644
index ef9d28dd1f..0000000000
--- a/src/mainboard/motorola/sandpoint/flash.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#ifndef _FLASH_H
-#define _FLASH_H
-
-struct flash_device;
-
-typedef struct flash_fn
-{
-    const char *(* identify)(struct flash_device *flash);
-    void *(* ptr)(void *data);
-    int (* erase_all)(void *data);
-    int (* erase)(void *data, unsigned offset, unsigned length);
-    int (* program)(void *data, unsigned offset, const void *source, unsigned length);    
-    uint8_t ( *read_byte)(void *data, unsigned offset);
-} flash_fn;
-
-typedef struct flash_device
-{
-    const flash_fn *fn;
-    char *tag;
-    void *data;
-    unsigned long base;
-    unsigned size;
-    unsigned erase_size;
-    unsigned store_size;
-    struct flash_device *next;
-} flash_device;
-
-int register_flash_device(const flash_fn *fn, char *tag, void *data);
-flash_device *find_flash_device(const char *tag);
-int init_flash_amd800(char *tag, unsigned base, unsigned spacing);
-
-#endif
diff --git a/src/mainboard/motorola/sandpoint/flash/Config.lb b/src/mainboard/motorola/sandpoint/flash/Config.lb
deleted file mode 100644
index d6405314e5..0000000000
--- a/src/mainboard/motorola/sandpoint/flash/Config.lb
+++ /dev/null
@@ -1,2 +0,0 @@
-object flash.o
-object amd800.o
diff --git a/src/mainboard/motorola/sandpoint/flash/amd800.c b/src/mainboard/motorola/sandpoint/flash/amd800.c
deleted file mode 100644
index fe62b78004..0000000000
--- a/src/mainboard/motorola/sandpoint/flash/amd800.c
+++ /dev/null
@@ -1,244 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#include <console/console.h>
-#include <stdlib.h>
-#include "../flash.h"
-
-struct data_amd800
-{
-    unsigned base;
-    unsigned spacing;
-    unsigned cs;
-    const char *tag;
-};
-
-static const char *identify_amd (struct flash_device *flash_device);
-static int erase_flash_amd800 (void *data, unsigned offset, unsigned length);
-static int program_flash_amd800 (void *data, unsigned offset, const void *source,
-				 unsigned length);
-static uint8_t read_byte_amd800(void *data, unsigned offset);
-
-static flash_fn fn_amd800 = {
-    identify_amd,
-    0,
-    0,
-    erase_flash_amd800,
-    program_flash_amd800,
-    read_byte_amd800
-};
-
-const char *identify_amd (struct flash_device *flash_device)
-{
-    struct data_amd800 *d800 = flash_device->data;
-
-    if (!d800->tag)
-    {
-	volatile unsigned char *flash =
-
-	    (volatile unsigned char *) d800->base;
-	unsigned char type,
-	 id;
-
-	*(flash + 0xaaa * d800->spacing) = 0xaa;
-	*(flash + 0x555 * d800->spacing) = 0x55;
-	*(flash + 0xaaa * d800->spacing) = 0x90;
-	type = *(flash + 2 * d800->spacing);
-	id = *flash;
-	*flash = 0xf0;
-	if ((id == 1 || id == 0x20) && type == 0x5b)
-	{
-	    d800->cs = 45;
-	    d800->tag = "Am29LV800BB";
-    	    flash_device->base = d800->base;
-    	    flash_device->size = 1024*1024;
-	    flash_device->erase_size = 64*1024;
-	    flash_device->store_size = 1;
-	}
-	else
-	{
-	    printk_info("Unknown flash ID: 0x%02x 0x%02x\n", id, type);
-	}
-    }
-    return d800->tag;
-}
-
-int erase_flash_amd800 (void *data, unsigned offset, unsigned length)
-{
-    struct data_amd800 *d800 = data;
-    volatile unsigned char *flash = (volatile unsigned char *) d800->base;
-    volatile unsigned char *flash_aaa = flash + 0xaaa * d800->spacing;
-    volatile unsigned char *flash_555 = flash + 0x555 * d800->spacing;
-    int id;
-    int cs = 9999;
-
-    printk_info("Erase from 0x%08x to 0x%08x\n", offset, offset + length);
-    *flash_aaa = 0xAA;		// Chip Erase
-    *flash_555 = 0x55;
-    *flash_aaa = 0x80;
-    *flash_aaa = 0xAA;
-    *flash_555 = 0x55;
-    *flash_aaa = 0x10;
-
-    for (; cs > 0; cs--)
-    {
-	id = *(flash + 16);
-	if (id & 0xA0)		// DQ7 or DQ5 set: done or error
-	    break;
-	printk_info("%4d\b\b\b\b", cs);
-    }
-
-    *flash_aaa = 0xF0;		// In case of error
-
-    printk_info("\b\b\b\b    \b\b\b\b");
-    if (cs == 0)
-    {
-	printk_info("Could not erase flash, timeout.\n");
-	return -1;
-    }
-    else if ((id & 0x80) == 0)
-    {
-	printk_info("Could not erase flash, status=%02x.\n", id);
-	return -1;
-    }
-    printk_info("Flash erased\n");
-    return 0;
-}
-
-int init_flash_amd800 (char *tag, unsigned base, unsigned spacing)
-{
-    struct data_amd800 *data = malloc (sizeof (struct data_amd800));
-
-    if (data)
-    {
-	data->base = base;
-	data->spacing = spacing;
-	data->tag = 0;
-	if (register_flash_device (&fn_amd800, tag, data) < 0)
-	{
-	    free (data);
-	    return -1;
-	}
-    }
-    else
-	return -1;
-    return 0;
-}
-
-int program_flash_amd800 (void *data, unsigned offset, const void *source,
-			  unsigned length)
-{
-    struct data_amd800 *d800 = data;
-    volatile unsigned char *flash = (volatile unsigned char *) d800->base;
-    volatile unsigned char *flash_aaa = flash + 0xaaa * d800->spacing;
-    volatile unsigned char *flash_555 = flash + 0x555 * d800->spacing;
-    int id = 0;
-    int cs;
-    int errs = 0;
-    volatile char *s;
-    volatile char *d;
-
-    printk_info("Program from 0x%08x to 0x%08x\n", offset, offset + length);
-    printk_info("Data at %p\n", source);
-
-    *flash_aaa = 0xAA;		// Unlock Bypass
-    *flash_555 = 0x55;
-    *flash_aaa = 0x20;
-
-    s = (unsigned char *) source;
-    d = flash + offset * d800->spacing;
-    cs = length;
-
-    while (cs > 0 && !errs)
-    {
-	*flash = 0xA0;	// Unlock Bypass Program
-	*d = *s;		// Program data
-
-	while (1)
-	{
-	    id = *d;
-	    if ((id & 0x80) == (*s & 0x80))	// DQ7 right? => program done
-		break;
-	    else if (id & 0x20)
-	    {			// DQ5 set? => maybe errors
-		id = *d;
-		if ((id & 0x80) != (*s & 0x80))
-		{
-		    errs++;
-		    break;
-		}
-	    }
-	}
-
-	// PRINT("Set %08lx = %02x\n", d, *d);
-
-	s += 1;
-	d += d800->spacing;
-	cs--;
-    }
-
-    *flash = 0x90;		// Unlock Bypass Program Reset
-    *flash = 0x00;
-    *flash = 0xF0;
-
-    if (errs != 0)
-    {
-	printk_info("FAIL: Status=%02x Address=%p.\n", id, d - d800->spacing);
-	return -1;
-    }
-    printk_info("OK.\n");
-
-
-    // Step 4: Verify the flash.
-
-    printk_info("  Verifying flash : ...");
-    errs = 0;
-    s = (unsigned char *) source;
-    d = flash + offset * d800->spacing;
-    for (cs = 0; cs < length; cs++)
-    {
-	if (*s != *d)
-	{
-	    if (errs == 0)
-		printk_info("ERROR: Addr: %08p, PCI: %02x Lcl: %02x.\n",
-		       s, *s, *d);
-	    errs++;
-	}
-	s += 1;
-	d += d800->spacing;
-    }
-
-    if (errs == 0)
-	printk_info("OK.\n");
-    else
-    {
-	printk_info("  FAIL: %d errors.\n", errs);
-	return -1;
-    }
-
-    return 0;
-}
-
-uint8_t read_byte_amd800 (void *data, unsigned offset)
-{
-    struct data_amd800 *d800 = data;
-    volatile unsigned char *flash = (volatile unsigned char *) d800->base;
-    return *(flash + offset * d800->spacing);
-}
-
diff --git a/src/mainboard/motorola/sandpoint/flash/flash.c b/src/mainboard/motorola/sandpoint/flash/flash.c
deleted file mode 100644
index 427a107944..0000000000
--- a/src/mainboard/motorola/sandpoint/flash/flash.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#include <string.h>
-#include <console/console.h>
-#include <stdlib.h>
-#include "../flash.h"
-
-static flash_device *first_flash = 0;
-
-int register_flash_device (const flash_fn * fn, char *tag, void *data)
-{
-    flash_device *device = malloc (sizeof (flash_device));
-
-    if (device)
-    {
-	const char *result;
-	device->fn = fn;
-	device->tag = tag;
-	device->data = data;
-	if ((result = fn->identify(device)) != 0)
-	{
-	    printk_info("Registered flash %s\n", result);
-	    device->next = first_flash;
-	    first_flash = device;
-	}
-	return result ? 0 : -1;
-    }
-    return -1;
-}
-
-flash_device *find_flash_device(const char *name)
-{
-    int len = strlen(name);
-
-    if (first_flash)
-    {
-	flash_device *flash;
-
-	for (flash = first_flash; flash; flash = flash->next)
-	    if (strlen(flash->tag) == len && memcmp(name, flash->tag, len) == 0)
-		return flash;
-    }
-    printk_info ("No flash %s registered\n", name);
-    return 0;
-}
diff --git a/src/mainboard/motorola/sandpoint/init.c b/src/mainboard/motorola/sandpoint/init.c
deleted file mode 100644
index 42acd35164..0000000000
--- a/src/mainboard/motorola/sandpoint/init.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * Copyright (C) 2003, Greg Watson <gwatson@lanl.gov>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-/*
- * Do very early board initialization:
- *
- * - Configure External Bus (EBC)
- * - Setup Flash
- * - Setup NVRTC
- * - Setup Board Control and Status Registers (BCSR)
- * - Enable UART0 for debugging
- */
-
-#include <ppc_asm.tmpl>
-#include <ppc.h>
-#include <arch/io.h>
-#include <printk.h>
-#include <uart8250.h>
-
-void pnp_output(char address, char data)
-{
-	outb(address, CONFIG_PNP_CFGADDR);
-	outb(data, CONFIG_PNP_CFGDATA);
-}
-
-void
-board_init(void)
-{
-	/*
-	 * Enable UART0
-	 *
-	 * NOTE: this configuration assumes that the PCI/ISA IO
-	 * address space is properly configured by default on board
-	 * reset. While this seems to be the case with the X3, it may not
- 	 * always work.
-	 */
-	pnp_output(0x07, 6); /* LD 6 = UART0 */
-	pnp_output(0x30, 0); /* Dectivate */
-	pnp_output(0x60, CONFIG_TTYS0_BASE >> 8); /* IO Base */
-	pnp_output(0x61, CONFIG_TTYS0_BASE & 0xFF); /* IO Base */
-	pnp_output(0x30, 1); /* Activate */
-	uart8250_init(CONFIG_TTYS0_BASE, 115200/CONFIG_TTYS0_BAUD, CONFIG_TTYS0_LCS);
-}
-
-void
-board_init2(void)
-{
-	printk_info("Sandpoint initialized...\n");
-}
diff --git a/src/mainboard/motorola/sandpoint/nvram.h b/src/mainboard/motorola/sandpoint/nvram.h
deleted file mode 100644
index f3ae4cbf9a..0000000000
--- a/src/mainboard/motorola/sandpoint/nvram.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-/* Definitions for nvram devices - these are flash or eeprom devices used to
-   store information across power cycles and resets. Though they are byte
-   addressable, writes must be committed to allow flash devices to write
-   complete sectors. */
-
-#ifndef _NVRAM_H
-#define _NVRAM_H
-
-typedef struct nvram_device
-{
-    unsigned (*size)(struct nvram_device *data);
-    int (*read_block)(struct nvram_device *dev, unsigned offset,
-	    unsigned char *data, unsigned length);
-    int (*write_byte)(struct nvram_device *dev, unsigned offset, unsigned char byte);
-    void (*commit)(struct nvram_device *data);
-    void *data;
-} nvram_device;
-
-int nvram_init (nvram_device *dev);
-void nvram_clear(void);
-
-extern nvram_device pcrtc_nvram;
-extern void nvram_putenv(const char *name, const char *value);
-extern  int nvram_getenv(const char *name, char *buffer, unsigned size);
-
-typedef const struct nvram_constant 
-{
-    const char *name;
-    const char *value;
-} nvram_constant;
-    
-extern nvram_constant hardcoded_environment[];
-
-#endif
diff --git a/src/mainboard/motorola/sandpoint/nvram/Config.lb b/src/mainboard/motorola/sandpoint/nvram/Config.lb
deleted file mode 100644
index b4ce01bfd0..0000000000
--- a/src/mainboard/motorola/sandpoint/nvram/Config.lb
+++ /dev/null
@@ -1,2 +0,0 @@
-object bsp_nvram.o
-object nvram.o
diff --git a/src/mainboard/motorola/sandpoint/nvram/bsp_nvram.c b/src/mainboard/motorola/sandpoint/nvram/bsp_nvram.c
deleted file mode 100644
index 79c28b8701..0000000000
--- a/src/mainboard/motorola/sandpoint/nvram/bsp_nvram.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * (C) Copyright 2001
- * Humboldt Solutions Ltd, adrian@humboldt.co.uk.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-#include <arch/io.h>
-#include "../nvram.h"
-
-static unsigned bsp_size(struct nvram_device *data)
-{
-    return 8 * 1024;   
-}
-
-static int bsp_read_block(struct nvram_device *dev, unsigned offset,
-	    unsigned char *data, unsigned length)
-{
-    unsigned i;
-    
-    for(i = 0; i < length; i++)
-    {
-	outb(((offset + i) >> 8) & 0xff, 0x74);
-	outb((offset + i) & 0xff, 0x75);
-	data[i] = inb(0x76);
-    }
-    return length;
-}
-   
-static int bsp_write_byte(struct nvram_device *data, unsigned offset, unsigned char byte)
-{
-    outb((offset >> 8) & 0xff, 0x74);
-    outb(offset & 0xff, 0x75);
-    outb(byte, 0x76);
-    return 1;
-}
-
-nvram_device bsp_nvram = {
-    bsp_size, bsp_read_block, bsp_write_byte, 0, 0   
-};
-    
diff --git a/src/mainboard/motorola/sandpoint/nvram/nvram.c b/src/mainboard/motorola/sandpoint/nvram/nvram.c
deleted file mode 100644
index 93e0eec572..0000000000
--- a/src/mainboard/motorola/sandpoint/nvram/nvram.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#include <console/console.h>
-#include <stdlib.h>
-#include "../nvram.h"
-
-/* NVRAM layout
- * 
- * Environment variable record runs:
- * [length]NAME=value[length]NAME=value[0]\0
- * A deleted variable is:
- * [length]\0AME=value
- * 
- * When memory is full, we compact.
- * 
- */
-static nvram_device *nvram_dev = 0;
-static unsigned char *nvram_buffer = 0;
-static unsigned nvram_size = 0;
-static uint8_t nvram_csum = 0;
-#define NVRAM_INVALID (! nvram_dev)
-
-static void update_device(unsigned i, unsigned char data)
-{
-    if (i < nvram_size)
-    {
-	nvram_csum -= nvram_buffer[i];
-	nvram_buffer[i] = data;
-	nvram_dev->write_byte(nvram_dev, i, data);
-	nvram_csum += data;
-    }
-    else
-	printk_info("Offset %d out of range in nvram\n", i);
-}
-
-static void update_csum(void)
-{
-    nvram_dev->write_byte(nvram_dev, nvram_size, nvram_csum);
-    if (nvram_dev->commit)
-	nvram_dev->commit(nvram_dev);
-}
-
-static void update_string_device(unsigned i, const unsigned char *data,
-	    	    	    unsigned len)
-{
-    if (i + len < nvram_size)
-    {
-	unsigned j;
-	for(j = 0; j < len; j++)
-	{
-	    nvram_csum -= nvram_buffer[i];
-    	    nvram_buffer[i] = *data;
-    	    nvram_dev->write_byte(nvram_dev, i, *data);
-    	    nvram_csum += *data;
-	    data++;
-	    i++;
-	}   
-    }
-    else
-	printk_info("Offset %d out of range in nvram\n", i + len);
-}
-
-int nvram_init (struct nvram_device *dev)
-{
-    nvram_dev = dev;
-    
-    if (! nvram_size)
-	nvram_size = dev->size(dev) - 1;
-    printk_info("NVRAM size is %d\n", nvram_size);
-    if (!nvram_buffer)
-    {
-	unsigned i;
-	
-	nvram_buffer = malloc (nvram_size);
-	if (!nvram_buffer)
-	    return -1;
-
-	nvram_csum = 0;
-	dev->read_block(dev, 0, nvram_buffer, nvram_size+1);
-	for(i = 0; i < nvram_size; i++)
-	    nvram_csum += nvram_buffer[i];
-
-	if (nvram_csum != nvram_buffer[nvram_size])
-	{
-	    printk_info("NVRAM checksum invalid - erasing\n");
-	    //update_device(0, 0);
-	    //update_csum();
-	}
-    }
-    printk_info("Initialised nvram\n");
-    return 0;
-}
-
-void nvram_clear(void)
-{
-    printk_info("Erasing NVRAM\n");
-    update_device(0, 0);
-    update_csum();    
-}
-
diff --git a/src/mainboard/motorola/sandpoint/sp7410.cfg b/src/mainboard/motorola/sandpoint/sp7410.cfg
deleted file mode 100644
index 95b96a5f0c..0000000000
--- a/src/mainboard/motorola/sandpoint/sp7410.cfg
+++ /dev/null
@@ -1,139 +0,0 @@
-; bdiGDB configuration file for the Sandpoint X3 evaluation system
-; with the Altimus 7410 PMC
-;-----------------------------------------------------------------
-;
-[INIT]
-; init core register
-WREG    MSR             0x00000000      ;clear MSR
-;
-; init memory controller (based on DINK32)
-WM32    0xFEC00000      0x46000080      ;select PCIARB
-WM16    0xFEE00002      0x0080          ;
-WM32    0xFEC00000      0x73000080      ;select ODCR
-WM8     0xFEE00003      0xd1            ;
-WM32    0xFEC00000      0x74000080      ;select CDCR
-WM16    0xFEE00000      0x00fd          ;
-WM32    0xFEC00000      0x76000080      ;select MICR
-WM8     0xFEE00002      0x40            ;
-WM32    0xFEC00000      0x80000080      ;select MSAR1
-WM32    0xFEE00000      0x0080a0c0      ;
-WM32    0xFEC00000      0x84000080      ;select MSAR2
-WM32    0xFEE00000      0xe0002040      ;
-WM32    0xFEC00000      0x88000080      ;select MSAR3
-WM32    0xFEE00000      0x00000000      ;
-WM32    0xFEC00000      0x8c000080      ;select MSAR4
-WM32    0xFEE00000      0x00010101      ;
-WM32    0xFEC00000      0x90000080      ;select MEAR1
-WM32    0xFEE00000      0x7f9fbfdf      ;
-WM32    0xFEC00000      0x94000080      ;select MEAR2
-WM32    0xFEE00000      0xff1f3f5f      ;
-WM32    0xFEC00000      0x98000080      ;select MEAR3
-WM32    0xFEE00000      0x00000000      ;
-WM32    0xFEC00000      0x9c000080      ;select MEAR4
-WM32    0xFEE00000      0x00010101      ;
-WM32    0xFEC00000      0xa0000080      ;select MBEN
-WM8     0xFEE00000      0x01            ;
-WM32    0xFEC00000      0xa3000080      ;select PGMAX
-WM8     0xFEE00003      0x32            ;
-WM32    0xFEC00000      0xa8000080      ;select PIC1
-WM32    0xFEE00000      0x981a14ff      ;
-WM32    0xFEC00000      0xac000080      ;select PIC2
-WM32    0xFEE00000      0x00000004      ;
-WM32    0xFEC00000      0xe0000080      ;select AMBOR
-WM8     0xFEE00000      0xc0            ;
-WM32    0xFEC00000      0xf0000080      ;select MCCR1
-WM32    0xFEE00000      0xaaaae075      ;do not set MEMGO
-WM32    0xFEC00000      0xf4000080      ;select MCCR2
-WM32    0xFEE00000      0x2c184004      ;
-WM32    0xFEC00000      0xf8000080      ;select MCCR3
-WM32    0xFEE00000      0x00003078      ;
-WM32    0xFEC00000      0xfc000080      ;select MCCR4
-WM32    0xFEE00000      0x39223235      ;
-DELAY 100
-WM32    0xFEC00000      0xf0000080      ;select MCCR1
-WM32    0xFEE00000      0xaaaae875      ;now set MEMGO
-;
-WM32    0xFEC00000      0x78000080      ;select EUMBBAR
-WM32    0xFEE00000      0x000000fc      ;Embedded utility memory block at 0xFC000000
-;
-;WM32    0xFEC00000      0xa8000080      ;select PICR1
-;WM32    0xFEE00000      0x901014ff      ;enable flash write (Flash on processor bus)
-
-;
-; Enable UART0
-;
-WM8     0xFE00015C      0x07
-WM8     0xFE00015D      0x06
-WM8     0xFE00015C      0x30
-WM8     0xFE00015D      0x00
-WM8     0xFE00015C      0x60
-WM8     0xFE00015D      0x03
-WM8     0xFE00015C      0x61
-WM8     0xFE00015D      0xf8
-WM8     0xFE00015C      0x30
-WM8     0xFE00015D      0x01
-;
-; define maximal transfer size
-;TSZ1    0xFF800000      0xFFFFFFFF      ;ROM space (only for PCI boot ROM)
-TSZ4    0xFF800000      0xFFFFFFFF      ;ROM space (only for Local bus flash)
-
-
-[TARGET]
-CPUTYPE     7400        ;the CPU type (603EV,750,8240,8260,7400)
-JTAGCLOCK   0           ;use 16 MHz JTAG clock
-WORKSPACE   0x00000000	;workspace in target RAM for data cache flush
-BDIMODE     AGENT     	;the BDI working mode (LOADONLY | AGENT | GATEWAY)
-BREAKMODE   HARD      	;SOFT or HARD, HARD uses PPC hardware breakpoint
-;STEPMODE    HWBP        ;TRACE or HWBP, HWPB uses a hardware breakpoint
-;VECTOR      CATCH       ;catch unhandled exceptions
-DCACHE      NOFLUSH	;data cache flushing (FLUSH | NOFLUSH)
-;PARITY      ON          ;enable data parity generation
-MEMDELAY    400        ;additional memory access delay
-;REGLIST     STD         ;select register to transfer to GDB
-;L2PM        0x00100000 0x80000 ;L2 privat memory
-;SIO         2002 115200
-SIO         2002 9600
-;MMU	    XLAT
-;PTBASE	    0x000000f0
-
-[HOST]
-IP          10.0.1.11
-;FILE        E:\cygnus\root\usr\demo\sp7400\vxworks
-FILE        coreboot.elf
-FORMAT      ELF
-;START       0x403104
-LOAD        MANUAL        ;load code MANUAL or AUTO after reset
-DEBUGPORT   2001
-
-[FLASH]
-; Am29LV800BB on local processor bus (RCS0)
-; set PPMC7410 switch SW2-1 OFF => ROM on Local bus
-; enable flash write in PICR1 (see INIT part)
-; set maximal transfer size to 4 bytes (see INIT part)
-CHIPTYPE    AM29BX8     ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16)
-CHIPSIZE    0x100000    ;The size of one flash chip in bytes (e.g. Am29LV800BB = 0x100000)
-BUSWIDTH    8           ;The width of the flash memory bus in bits (8 | 16 | 32 | 64)
-WORKSPACE   0x00000000  ;workspace in SDRAM
-FILE        coreboot.elf
-FORMAT      ELF
-ERASE       0xFFF00000  ;erase sector 0 of flash
-ERASE       0xFFF04000  ;erase sector 1 of flash
-ERASE       0xFFF06000  ;erase sector 2 of flash
-ERASE       0xFFF08000  ;erase sector 3 of flash
-ERASE       0xFFF10000  ;erase sector 4 of flash
-ERASE       0xFFF20000  ;erase sector 5 of flash
-ERASE       0xFFF30000  ;erase sector 6 of flash
-ERASE       0xFFF40000  ;erase sector 7 of flash
-ERASE       0xFFF50000  ;erase sector 8 of flash
-ERASE       0xFFF60000  ;erase sector 9 of flash
-ERASE       0xFFF70000  ;erase sector 10 of flash
-
-[REGS]
-DMM1        0xFC000000                  ;Embedded utility memory base address
-IMM1        0xFEC00000  0xFEE00000      ;configuration registers at byte offset 0
-IMM2        0xFEC00000  0xFEE00001      ;configuration registers at byte offset 1
-IMM3        0xFEC00000  0xFEE00002      ;configuration registers at byte offset 2
-IMM4        0xFEC00000  0xFEE00003      ;configuration registers at byte offset 3
-FILE        mpc107.def
-
-
diff --git a/src/mainboard/motorola/sandpointx3_altimus_mpc7410/Config.lb b/src/mainboard/motorola/sandpointx3_altimus_mpc7410/Config.lb
deleted file mode 100644
index 89338e00eb..0000000000
--- a/src/mainboard/motorola/sandpointx3_altimus_mpc7410/Config.lb
+++ /dev/null
@@ -1,37 +0,0 @@
-##
-## Config file for the Motorola Sandpoint III development system.
-## Note that this has only been tested with the Altimus 7410 PMC.
-##
-
-dir /mainboard/motorola/sandpoint
-
-##
-## Build the objects we have code for in this directory.
-##
-
-chip northbridge/motorola/mpc107
-	device pci_domain 0 on
-		device pci 0.0 on end
-		device pci b.0 on
-			chip southbridge/winbond/w83c553
-				chip superio/nsc/pc97307
-					device pnp 15c.0 on end # Kyeboard
-					device pnp 15c.1 on end # Mouse
-					device pnp 15c.2 on end # Real-time Clock
-					device pnp 15c.3 on end # Floppy
-					device pnp 15c.4 on end # Parallel port
-					device pnp 15c.5 on end # com2
-					device pnp 15c.6 on end # com1
-					device pnp 15c.7 on end # gpio
-					device pnp 15c.8 on end # Power management
-				end
-			end
-		end # pci to isa bridge
-		device pci b.1 on end # pci ide controller
-	end
-	device cpu_bus 0 on
-		chip cpu/ppc/mpc74xx
-			device cpu 0 on end
-		end
-	end
-end
diff --git a/src/mainboard/motorola/sandpointx3_altimus_mpc7410/Options.lb b/src/mainboard/motorola/sandpointx3_altimus_mpc7410/Options.lb
deleted file mode 100644
index a4108ad111..0000000000
--- a/src/mainboard/motorola/sandpointx3_altimus_mpc7410/Options.lb
+++ /dev/null
@@ -1,129 +0,0 @@
-uses CONFIG_ARCH_X86
-uses CONFIG_ISA_IO_BASE
-uses CONFIG_CBFS
-uses CONFIG_ISA_MEM_BASE
-uses CONFIG_PCIC0_CFGADDR
-uses CONFIG_PCIC0_CFGDATA
-uses CONFIG_PNP_CFGADDR
-uses CONFIG_PNP_CFGDATA
-uses CONFIG_IO_BASE
-
-uses CONFIG_CROSS_COMPILE 
-uses CONFIG_HAVE_OPTION_TABLE
-uses CONFIG_SANDPOINT_ALTIMUS 
-uses CONFIG_COMPRESS 
-uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL 
-uses CONFIG_USE_INIT
-uses CONFIG_CHIP_CONFIGURE
-uses CONFIG_NO_POST
-uses CONFIG_CONSOLE_SERIAL8250 
-uses CONFIG_TTYS0_BASE 
-uses CONFIG_IDE
-uses CONFIG_FS_PAYLOAD 
-uses CONFIG_FS_EXT2
-uses CONFIG_FS_ISO9660
-uses CONFIG_FS_FAT
-uses CONFIG_COMPRESSED_PAYLOAD_LZMA
-uses CONFIG_PRECOMPRESSED_PAYLOAD
-uses CONFIG_AUTOBOOT_CMDLINE
-uses CONFIG_PAYLOAD_SIZE
-uses CONFIG_ROM_SIZE
-uses CONFIG_ROM_IMAGE_SIZE
-uses CONFIG_RESET
-uses CONFIG_EXCEPTION_VECTORS
-uses CONFIG_ROMBASE
-uses CONFIG_ROMSTART
-uses CONFIG_RAMBASE
-uses CONFIG_RAMSTART
-uses CONFIG_STACK_SIZE
-uses CONFIG_HEAP_SIZE
-
-uses CONFIG_MAINBOARD
-uses CONFIG_MAINBOARD_VENDOR
-uses CONFIG_MAINBOARD_PART_NUMBER
-uses COREBOOT_EXTRA_VERSION
-uses CONFIG_CROSS_COMPILE
-uses CC
-uses HOSTCC
-uses CONFIG_OBJCOPY
-
-##
-## Set memory map
-##
-default CONFIG_ISA_IO_BASE=0xfe000000
-default CONFIG_ISA_MEM_BASE=0xfd000000
-default CONFIG_PCIC0_CFGADDR=0xfec00000
-default CONFIG_PCIC0_CFGDATA=0xfee00000
-default CONFIG_PNP_CFGADDR=0x15c
-default CONFIG_PNP_CFGDATA=0x15d
-default CONFIG_IO_BASE=CONFIG_ISA_IO_BASE
-
-##
-## The default compiler
-##
-default CC="$(CONFIG_CROSS_COMPILE)gcc"
-default HOSTCC="gcc"
-## use a cross compiler
-#default CONFIG_CROSS_COMPILE="powerpc-eabi-"
-#default CONFIG_CROSS_COMPILE="ppc_74xx-"
-default CONFIG_ARCH_X86=0
-
-## Use stage 1 initialization code
-default CONFIG_USE_INIT=1
-
-## Use static configuration
-default CONFIG_CHIP_CONFIGURE=1
-
-## We don't use compressed image
-default CONFIG_COMPRESS=0
-
-## Turn off POST codes
-default CONFIG_NO_POST=1
-
-## Enable serial console
-default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
-default CONFIG_CONSOLE_SERIAL8250=1
-default CONFIG_TTYS0_BASE=0x3f8
-
-## Load payload using filo
-default CONFIG_IDE=1
-default CONFIG_FS_PAYLOAD=1
-default CONFIG_FS_EXT2=1
-default CONFIG_FS_ISO9660=1
-default CONFIG_FS_FAT=1
-default CONFIG_AUTOBOOT_CMDLINE="hdc1:/vmlinuz"
-
-# coreboot must fit into 128KB
-default CONFIG_ROM_IMAGE_SIZE=160*1024
-default CONFIG_ROM_SIZE=384*1024
-default CONFIG_PAYLOAD_SIZE=262144
-
-# Set stack and heap sizes (stage 2)
-default CONFIG_STACK_SIZE=0x10000
-default CONFIG_HEAP_SIZE=0x10000
-
-# Sandpoint Demo Board
-## Base of ROM
-default CONFIG_ROMBASE=0xfff00000
-
-## Sandpoint reset vector
-default CONFIG_RESET=CONFIG_ROMBASE+0x100
-
-## Exception vectors (other than reset vector)
-default CONFIG_EXCEPTION_VECTORS=CONFIG_RESET+0x100
-
-## Start of coreboot in the boot rom
-## = CONFIG_RESET + exeception vector table size
-default CONFIG_ROMSTART=CONFIG_RESET+0x3100
-
-## Coreboot C code runs at this location in RAM
-default CONFIG_RAMBASE=0x00100000
-default CONFIG_RAMSTART=0x00100000
-
-### End Options.lb
-#
-# CBFS
-#
-#
-default CONFIG_CBFS=1
-end
diff --git a/src/mainboard/motorola/sandpointx3_altimus_mpc7410/STATUS b/src/mainboard/motorola/sandpointx3_altimus_mpc7410/STATUS
deleted file mode 100644
index 1f528e38da..0000000000
--- a/src/mainboard/motorola/sandpointx3_altimus_mpc7410/STATUS
+++ /dev/null
@@ -1,27 +0,0 @@
-# These are keyword-value pairs. 
-# a : separates the keyword from the value 
-# the value is arbitrary text delimited by newline. 
-# continuation, if needed, will be via the \ at the end of a line
-# comments are indicated by a '#' as the first character. 
-# the keywords are case-INSENSITIVE
-owner:	Greg Watson
-email:	gwatson@lanl.gov
-#status: One of unsupported, unstable, stable
-status: unstable
-explanation: currently under development
-flash-types: 
-payload-types: 
-# e.g. linux, plan 9, wince, etc.
-OS-types: linux
-# e.g. "Plan 9 interrupts don't work on this chipset"
-OS-issues:
-console-types: serial
-# vga is unsupported, unstable, or stable
-vga: unsupported
-# Last-known-good follows the internationl date standard: day/month/year
-last-known-good: 19/04/2003
-Comments: 
-Links:
-Mainboard-revision: 
-# What other mainboards are like this one? List them here. 
-AKA: 
diff --git a/src/mainboard/motorola/sandpointx3_altimus_mpc7410/abuild.info b/src/mainboard/motorola/sandpointx3_altimus_mpc7410/abuild.info
deleted file mode 100644
index 3e9c8f1f57..0000000000
--- a/src/mainboard/motorola/sandpointx3_altimus_mpc7410/abuild.info
+++ /dev/null
@@ -1,2 +0,0 @@
-# Target architecture can't be parsed here.
-TARCH=ppc
diff --git a/src/mainboard/motorola/sandpointx3_altimus_mpc7410/devicetree.cb b/src/mainboard/motorola/sandpointx3_altimus_mpc7410/devicetree.cb
deleted file mode 100644
index bc13ca4471..0000000000
--- a/src/mainboard/motorola/sandpointx3_altimus_mpc7410/devicetree.cb
+++ /dev/null
@@ -1,26 +0,0 @@
-chip northbridge/motorola/mpc107
-	device pci_domain 0 on
-		device pci 0.0 on end
-		device pci b.0 on
-			chip southbridge/winbond/w83c553
-				chip superio/nsc/pc97307
-					device pnp 15c.0 on end # Kyeboard
-					device pnp 15c.1 on end # Mouse
-					device pnp 15c.2 on end # Real-time Clock
-					device pnp 15c.3 on end # Floppy
-					device pnp 15c.4 on end # Parallel port
-					device pnp 15c.5 on end # com2
-					device pnp 15c.6 on end # com1
-					device pnp 15c.7 on end # gpio
-					device pnp 15c.8 on end # Power management
-				end
-			end
-		end # pci to isa bridge
-		device pci b.1 on end # pci ide controller
-	end
-	device cpu_bus 0 on
-		chip cpu/ppc/mpc74xx
-			device cpu 0 on end
-		end
-	end
-end