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authorNico Huber <nico.huber@secunet.com>2019-02-01 14:20:01 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-02-05 13:26:29 +0000
commit53229425c72fd702d980a0b363becf6f2516e69f (patch)
tree4d7ade3e159bb7ad545af6b546896780e762e685 /src
parent5aba3a2c06be6e35f14a2358b5d673b0e684015d (diff)
downloadcoreboot-53229425c72fd702d980a0b363becf6f2516e69f.tar.xz
soc/intel/cpulib: Add debug message to mca_configure()
Change-Id: Idfe93e454cc0ce0d8e06e23beaddee2f11f5eedd Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/31199 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/common/block/cpu/cpulib.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c
index d18b50cb3f..ece79d66ce 100644
--- a/src/soc/intel/common/block/cpu/cpulib.c
+++ b/src/soc/intel/common/block/cpu/cpulib.c
@@ -323,6 +323,8 @@ void mca_configure(void *unused)
int i;
int num_banks;
+ printk(BIOS_DEBUG, "Clearing out pending MCEs\n");
+
msr = rdmsr(IA32_MCG_CAP);
num_banks = msr.lo & 0xff;
msr.lo = msr.hi = 0;