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| author | John Zhao <john.zhao@intel.com> | 2019-05-20 16:10:16 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-29 20:09:17 +0000 |
| commit | 57448845ff549f9aa75c3d49c9b292accb5dbc99 (patch) | |
| tree | 8c3eb1176e3541f93cfcfe06bf0dda32f313263a /src | |
| parent | 6336ee6df936e7e67a7e3cdc8185214ae9cb668a (diff) | |
| download | coreboot-57448845ff549f9aa75c3d49c9b292accb5dbc99.tar.xz | |
soc/intel/apollolake: Fix value stored to gnvs is never read
Clang Static Analyzer found version 8.0.0 gnvs is allocated, but
it is never used. Change sizeof(*gnvs) to sizeof(global_nvs_t)
while adding ACPI GNVS to CBMEM.
TEST=Built and boot up to kernel.
Change-Id: Ie9421af4a556d1d88183aa938ee2a124a10ab727
Signed-off-by: John Zhao <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32903
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/apollolake/chip.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index f6880a7f3f..e9030dc2df 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -389,8 +389,6 @@ static void set_sci_irq(void) static void soc_init(void *data) { - struct global_nvs_t *gnvs; - /* Snapshot the current GPIO IRQ polarities. FSP is setting a * default policy that doesn't honor boards' requirements. */ itss_snapshot_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END); @@ -418,7 +416,7 @@ static void soc_init(void *data) p2sb_unhide(); /* Allocate ACPI NVS in CBMEM */ - gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); + cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(struct global_nvs_t)); /* Set RAPL MSR for Package power limits*/ set_power_limits(); |