diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-05-07 01:23:59 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-12 19:41:01 +0000 |
| commit | 5e64f01e791825a866a51919cd006de6512389df (patch) | |
| tree | d16c21fb5a4711760d2955a107f27fdd4a4eb1b5 /src | |
| parent | c08bf025f7609d535e806787d9a1f12f4b33f17e (diff) | |
| download | coreboot-5e64f01e791825a866a51919cd006de6512389df.tar.xz | |
soc/intel/skl: Drop weak mainboard_memory_init_params
We should not need that.
Change-Id: Ic0181a300670ed7ee999dafedac79f3f89bfbee9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41114
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Michael Niewöhner
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/skylake/romstage/romstage.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index e2afdc59a3..99f444ad5e 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -323,8 +323,3 @@ void soc_update_memory_params_for_mma(FSP_M_CONFIG *memory_cfg, memory_cfg->MrcFastBoot = 0x00; memory_cfg->SaGv = 0x02; } - -__weak void mainboard_memory_init_params(FSPM_UPD *mupd) -{ - /* Do nothing */ -} |