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authorMohammed Habibulla <moch@chromium.org>2013-11-12 13:29:43 -0800
committerPatrick Georgi <patrick@georgi-clan.de>2014-07-12 20:16:47 +0200
commit74a4175912cfdb6d115dd0f7f58c80fb5ff192ca (patch)
treef79cdcf388ebff15aa79dd49b48f37eadc965640 /src
parentfcb5270d54b9f0eb60deaa942e3475ef59cf5f0f (diff)
downloadcoreboot-74a4175912cfdb6d115dd0f7f58c80fb5ff192ca.tar.xz
google/panther: Make sure the S5 power status is on track
(panther port of I933c475f693b0271f86b5166eb2c9b3873f1c2c6) BUG=none BRANCH=none TEST=boot test on panther Change-Id: I5958a8d701901706eaa38df4323120c8352fea5c Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/176563 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Queue: Mohammed Habibulla <moch@chromium.org> Tested-by: Mohammed Habibulla <moch@chromium.org> Reviewed-on: http://review.coreboot.org/5993 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/panther/devicetree.cb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/panther/devicetree.cb b/src/mainboard/google/panther/devicetree.cb
index 39d4f0677d..8bce6919e8 100644
--- a/src/mainboard/google/panther/devicetree.cb
+++ b/src/mainboard/google/panther/devicetree.cb
@@ -110,6 +110,7 @@ chip northbridge/intel/haswell
device pnp 2e.4 on # Environment Controller
io 0x60 = 0x700
io 0x62 = 0x710
+ irq 0xfa = 0x12
end
device pnp 2e.7 on # GPIO
io 0x60 = 0x720