superio: Use 'pnp_devfn_t' over 'device_t' in romstage component

The romstage component of Super I/O support is in fact written around
passing a lower and upper half packed integer. We currently have two
typedef's for this, 'device_t' and 'pnp_devfn_t'. We wish to make use of
'pnp_devfn_t' over 'device_t' as 'device_t' changes it's typedef in the
ramstage context and so is really a conflicting definition. This helps
solve problems down the road to having the 'real' 'device_t' definition
usable in romstage later.

This follows on from the rational given in:
c2956e7 device/pci_early.c: Mixes up variants of a typedefs to 'u32'

Change-Id: Ia9f238ebb944f9fe7b274621ee0c09a6de288a76
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6231
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins)

61 files changed, 162 insertions, 162 deletions

diff --git a/src/superio/fintek/common/early_serial.c b/src/superio/fintek/common/early_serial.c
index d74b786d50..4433d1101f 100644
--- a/src/superio/fintek/common/early_serial.c
+++ b/src/superio/fintek/common/early_serial.c
@@ -46,7 +46,7 @@
 #define FINTEK_EXIT_KEY 0xAA
 
 /* Enable configuration: pass entry key '0x87' into index port dev. */
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(FINTEK_ENTRY_KEY, port);
@@ -54,14 +54,14 @@ static void pnp_enter_conf_state(device_t dev)
 }
 
 /* Disable configuration: pass exit key '0xAA' into index port dev. */
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(FINTEK_EXIT_KEY, port);
 }
 
 /* Bring up early serial debugging output before the RAM is initialized. */
-void fintek_enable_serial(device_t dev, u16 iobase)
+void fintek_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/fintek/common/fintek.h b/src/superio/fintek/common/fintek.h
index a08cf92264..1bc308b210 100644
--- a/src/superio/fintek/common/fintek.h
+++ b/src/superio/fintek/common/fintek.h
@@ -24,6 +24,6 @@
 #include <arch/io.h>
 #include <stdint.h>
 
-void fintek_enable_serial(device_t dev, u16 iobase);
+void fintek_enable_serial(pnp_devfn_t dev, u16 iobase);
 
 #endif /* SUPERIO_FINTEK_COMMON_ROMSTAGE_H */
diff --git a/src/superio/intel/i3100/early_serial.c b/src/superio/intel/i3100/early_serial.c
index f95cf8a533..96bb5501cf 100644
--- a/src/superio/intel/i3100/early_serial.c
+++ b/src/superio/intel/i3100/early_serial.c
@@ -21,7 +21,7 @@
 #include <arch/io.h>
 #include "i3100.h"
 
-static void pnp_enter_ext_func_mode(device_t dev)
+static void pnp_enter_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 
@@ -29,7 +29,7 @@ static void pnp_enter_ext_func_mode(device_t dev)
 	outb(0x86, port);
 }
 
-static void pnp_exit_ext_func_mode(device_t dev)
+static void pnp_exit_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 
@@ -38,14 +38,14 @@ static void pnp_exit_ext_func_mode(device_t dev)
 }
 
 /* Enable device interrupts, set UART_CLK predivide. */
-static void i3100_configure_uart_clk(device_t dev, u8 predivide)
+static void i3100_configure_uart_clk(pnp_devfn_t dev, u8 predivide)
 {
 	pnp_enter_ext_func_mode(dev);
 	pnp_write_config(dev, I3100_SIW_CONFIGURATION, (predivide << 2) | 1);
 	pnp_exit_ext_func_mode(dev);
 }
 
-static void i3100_enable_serial(device_t dev, u16 iobase)
+static void i3100_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_ext_func_mode(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/ite/common/early_serial.c b/src/superio/ite/common/early_serial.c
index 73354d458c..a57c047c1c 100644
--- a/src/superio/ite/common/early_serial.c
+++ b/src/superio/ite/common/early_serial.c
@@ -33,14 +33,14 @@
 #define ITE_CONFIG_REG_WATCHDOG  0x72 /* watchdog config */
 
 /* Helper procedure */
-static void ite_sio_write(device_t dev, u8 reg, u8 value)
+static void ite_sio_write(pnp_devfn_t dev, u8 reg, u8 value)
 {
 	pnp_set_logical_device(dev);
 	pnp_write_config(dev, reg, value);
 }
 
 /* Enable configuration */
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 
@@ -51,12 +51,12 @@ static void pnp_enter_conf_state(device_t dev)
 }
 
 /* Disable configuration */
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
 {
 	ite_sio_write(dev, ITE_CONFIG_REG_CC, 0x02);
 }
 
-void ite_reg_write(device_t dev, u8 reg, u8 value)
+void ite_reg_write(pnp_devfn_t dev, u8 reg, u8 value)
 {
 	pnp_enter_conf_state(dev);
 	ite_sio_write(dev, reg, value);
@@ -71,13 +71,13 @@ void ite_reg_write(device_t dev, u8 reg, u8 value)
  * ITE_UART_CLK_PREDIVIDE_24
  * ITE_UART_CLK_PREDIVIDE_48 (default)
  */
-void ite_conf_clkin(device_t dev, u8 predivide)
+void ite_conf_clkin(pnp_devfn_t dev, u8 predivide)
 {
 	ite_reg_write(dev, ITE_CONFIG_REG_CLOCKSEL, (0x1 & predivide));
 }
 
 /* Bring up early serial debugging output before the RAM is initialized. */
-void ite_enable_serial(device_t dev, u16 iobase)
+void ite_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
@@ -101,7 +101,7 @@ void ite_enable_serial(device_t dev, u16 iobase)
  * and pass: GPIO_DEV
  */
 
-void ite_enable_3vsbsw(device_t dev)
+void ite_enable_3vsbsw(pnp_devfn_t dev)
 {
 	u8 tmp;
 	pnp_enter_conf_state(dev);
@@ -118,7 +118,7 @@ void ite_enable_3vsbsw(device_t dev)
  * and pass: GPIO_DEV
 */
 
-void ite_kill_watchdog(device_t dev)
+void ite_kill_watchdog(pnp_devfn_t dev)
 {
 	pnp_enter_conf_state(dev);
 	ite_sio_write(dev, ITE_CONFIG_REG_WATCHDOG, 0x00);
diff --git a/src/superio/ite/common/ite.h b/src/superio/ite/common/ite.h
index 5389f1416c..c732664db6 100644
--- a/src/superio/ite/common/ite.h
+++ b/src/superio/ite/common/ite.h
@@ -27,12 +27,12 @@
 #define ITE_UART_CLK_PREDIVIDE_48 0x00 /* default */
 #define ITE_UART_CLK_PREDIVIDE_24 0x01
 
-void ite_conf_clkin(device_t dev, u8 predivide);
-void ite_enable_serial(device_t dev, u16 iobase);
+void ite_conf_clkin(pnp_devfn_t dev, u8 predivide);
+void ite_enable_serial(pnp_devfn_t dev, u16 iobase);
 
 /* Some boards need to init wdt+gpio's very early */
-void ite_reg_write(device_t dev, u8 reg, u8 value);
-void ite_enable_3vsbsw(device_t dev);
-void ite_kill_watchdog(device_t dev);
+void ite_reg_write(pnp_devfn_t dev, u8 reg, u8 value);
+void ite_enable_3vsbsw(pnp_devfn_t dev);
+void ite_kill_watchdog(pnp_devfn_t dev);
 
 #endif /* SUPERIO_ITE_COMMON_ROMSTAGE_H */
diff --git a/src/superio/ite/it8661f/early_serial.c b/src/superio/ite/it8661f/early_serial.c
index 7373f71975..19d60b1eb8 100644
--- a/src/superio/ite/it8661f/early_serial.c
+++ b/src/superio/ite/it8661f/early_serial.c
@@ -26,7 +26,7 @@
 /* Base address 0x3f0: 0x86 0x80 0x55 0x55. */
 /* Base address 0x3bd: 0x86 0x80 0x55 0xaa. */
 /* Base address 0x370: 0x86 0x80 0xaa 0x55. */
-static void pnp_enter_ext_func_mode(device_t dev)
+static void pnp_enter_ext_func_mode(pnp_devfn_t dev)
 {
 	int i;
 	u16 port = dev >> 8;
@@ -42,7 +42,7 @@ static void pnp_enter_ext_func_mode(device_t dev)
 		outb(init_values[i], port);
 }
 
-static void pnp_exit_ext_func_mode(device_t dev)
+static void pnp_exit_ext_func_mode(pnp_devfn_t dev)
 {
 	pnp_write_config(dev, IT8661F_REG_CC, (1 << 1));
 }
@@ -55,21 +55,21 @@ static void pnp_exit_ext_func_mode(device_t dev)
  *
  * Bits: FDC (0), Com1 (1), Com2 (2), PP (3), IR (4). Bits 5-7 are reserved.
  */
-static void it8661f_enable_logical_devices(device_t dev)
+static void it8661f_enable_logical_devices(pnp_devfn_t dev)
 {
 	pnp_enter_ext_func_mode(dev);
 	pnp_write_config(dev, IT8661F_REG_LDE, 0x1f);
 	pnp_exit_ext_func_mode(dev);
 }
 
-static void it8661f_set_clkin(device_t dev, u8 clkin)
+static void it8661f_set_clkin(pnp_devfn_t dev, u8 clkin)
 {
 	pnp_enter_ext_func_mode(dev);
 	pnp_write_config(dev, IT8661F_REG_SWSUSP, (clkin << 1));
 	pnp_exit_ext_func_mode(dev);
 }
 
-void it8661f_enable_serial(device_t dev, u16 iobase)
+void it8661f_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_ext_func_mode(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/ite/it8661f/it8661f.h b/src/superio/ite/it8661f/it8661f.h
index 045a54c46c..297dea3d21 100644
--- a/src/superio/ite/it8661f/it8661f.h
+++ b/src/superio/ite/it8661f/it8661f.h
@@ -52,6 +52,6 @@ static const u8 init_values[] = {
 	0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39,
 };
 
-void it8661f_enable_serial(device_t dev, u16 iobase);
+void it8661f_enable_serial(pnp_devfn_t dev, u16 iobase);
 
 #endif /* SUPERIO_ITE_IT8661F_H */
diff --git a/src/superio/ite/it8671f/early_serial.c b/src/superio/ite/it8671f/early_serial.c
index 9f35b8ad8e..89feb5f6f7 100644
--- a/src/superio/ite/it8671f/early_serial.c
+++ b/src/superio/ite/it8671f/early_serial.c
@@ -89,7 +89,7 @@ void it8671f_48mhz_clkin(void)
 }
 
 /* Enable the serial port(s). */
-void it8671f_enable_serial(device_t dev, u16 iobase)
+void it8671f_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	it8671f_enter_conf();
 
diff --git a/src/superio/ite/it8671f/it8671f.h b/src/superio/ite/it8671f/it8671f.h
index c3865ff74e..90f14814da 100644
--- a/src/superio/ite/it8671f/it8671f.h
+++ b/src/superio/ite/it8671f/it8671f.h
@@ -34,6 +34,6 @@
 #define IT8671F_KBCM 0x06 /* PS/2 mouse */
 
 void it8671f_48mhz_clkin(void);
-void it8671f_enable_serial(device_t dev, u16 iobase);
+void it8671f_enable_serial(pnp_devfn_t dev, u16 iobase);
 
 #endif /* SUPERIO_ITE_IT8671F__H */
diff --git a/src/superio/ite/it8718f/early_serial.c b/src/superio/ite/it8718f/early_serial.c
index 166c8569b6..563132af84 100644
--- a/src/superio/ite/it8718f/early_serial.c
+++ b/src/superio/ite/it8718f/early_serial.c
@@ -27,7 +27,7 @@
  * mechanism. It lives in the GPIO LDN. However, register 0xEF is not
  * mentioned in the IT8718F datasheet so just hardcode it to 0x7E for now.
  */
-void it8718f_disable_reboot(device_t dev)
+void it8718f_disable_reboot(pnp_devfn_t dev)
 {
 	ite_reg_write(dev, 0xEF, 0x7E);
 }
diff --git a/src/superio/ite/it8718f/it8718f.h b/src/superio/ite/it8718f/it8718f.h
index 61c75cf170..c0a79c2664 100644
--- a/src/superio/ite/it8718f/it8718f.h
+++ b/src/superio/ite/it8718f/it8718f.h
@@ -35,6 +35,6 @@
 #define IT8718F_GPIO 0x07 /* GPIO */
 #define IT8718F_IR   0x0a /* Consumer IR */
 
-void it8718f_disable_reboot(device_t dev);
+void it8718f_disable_reboot(pnp_devfn_t dev);
 
 #endif /* SUPERIO_ITE_IT8718F_H */
diff --git a/src/superio/ite/it8772f/early_init.c b/src/superio/ite/it8772f/early_init.c
index 1ae80c8294..55e06f74b9 100644
--- a/src/superio/ite/it8772f/early_init.c
+++ b/src/superio/ite/it8772f/early_init.c
@@ -26,8 +26,8 @@
 /* NOTICE: This file is deprecated, use ite/common instead */
 
 /* RAMstage equiv */
-/* u8 pnp_read_config(device_t dev, u8 reg) */
-u8 it8772f_sio_read(device_t dev, u8 reg)
+/* u8 pnp_read_config(pnp_devfn_t dev, u8 reg) */
+u8 it8772f_sio_read(pnp_devfn_t dev, u8 reg)
 {
 	u16 port = dev >> 8;
 
@@ -36,8 +36,8 @@ u8 it8772f_sio_read(device_t dev, u8 reg)
 }
 
 /* RAMstage equiv */
-/* void pnp_write_config(device_t dev, u8 reg, u8 value) */
-void it8772f_sio_write(device_t dev, u8 reg, u8 value)
+/* void pnp_write_config(pnp_devfn_t dev, u8 reg, u8 value) */
+void it8772f_sio_write(pnp_devfn_t dev, u8 reg, u8 value)
 {
 	u16 port = dev >> 8;
 
@@ -45,7 +45,7 @@ void it8772f_sio_write(device_t dev, u8 reg, u8 value)
 	outb(value, port + 1);
 }
 
-void it8772f_enter_conf(device_t dev)
+void it8772f_enter_conf(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 
@@ -55,13 +55,13 @@ void it8772f_enter_conf(device_t dev)
 	outb((port == 0x4e) ? 0xaa : 0x55, port);
 }
 
-void it8772f_exit_conf(device_t dev)
+void it8772f_exit_conf(pnp_devfn_t dev)
 {
 	it8772f_sio_write(dev, IT8772F_CONFIG_REG_CC, 0x02);
 }
 
 /* Set AC resume to be up to the Southbridge */
-void it8772f_ac_resume_southbridge(device_t dev)
+void it8772f_ac_resume_southbridge(pnp_devfn_t dev)
 {
 	it8772f_enter_conf(dev);
 	it8772f_sio_write(dev, IT8772F_CONFIG_REG_LDN, IT8772F_EC);
@@ -70,7 +70,7 @@ void it8772f_ac_resume_southbridge(device_t dev)
 }
 
 /* Configure a set of GPIOs */
-void it8772f_gpio_setup(device_t dev, int set, u8 select, u8 polarity,
+void it8772f_gpio_setup(pnp_devfn_t dev, int set, u8 select, u8 polarity,
 			u8 pullup, u8 output, u8 enable)
 {
 	set--; /* Set 1 is offset 0 */
diff --git a/src/superio/ite/it8772f/it8772f.h b/src/superio/ite/it8772f/it8772f.h
index 09eeb8f381..43e7d4cf43 100644
--- a/src/superio/ite/it8772f/it8772f.h
+++ b/src/superio/ite/it8772f/it8772f.h
@@ -106,10 +106,10 @@
 #include <arch/io.h>
 #include <stdint.h>
 
-u8 it8772f_sio_read(device_t dev, u8 reg);
-void it8772f_sio_write(device_t dev, u8 reg, u8 value);
-void it8772f_ac_resume_southbridge(device_t dev);
-void it8772f_gpio_setup(device_t dev, int set, u8 select, u8 polarity,
+u8 it8772f_sio_read(pnp_devfn_t dev, u8 reg);
+void it8772f_sio_write(pnp_devfn_t dev, u8 reg, u8 value);
+void it8772f_ac_resume_southbridge(pnp_devfn_t dev);
+void it8772f_gpio_setup(pnp_devfn_t dev, int set, u8 select, u8 polarity,
 			u8 pullup, u8 output, u8 enable);
 
 /* FIXME: should be static so will be removed later.. */
@@ -117,7 +117,7 @@ void it8772f_gpio_setup(device_t dev, int set, u8 select, u8 polarity,
 #define IT8772F_CONFIG_REG_CC        0x02 /* Configure Control (write-only). */
 #define IT8772F_CONFIG_REG_LDN       0x07 /* Logical Device Number. */
 
-void it8772f_enter_conf(device_t dev);
-void it8772f_exit_conf(device_t dev);
+void it8772f_enter_conf(pnp_devfn_t dev);
+void it8772f_exit_conf(pnp_devfn_t dev);
 
 #endif /* SUPERIO_ITE_IT8772F_H */
diff --git a/src/superio/nsc/pc8374/early_init.c b/src/superio/nsc/pc8374/early_init.c
index d3f601df12..a5e9b950e3 100644
--- a/src/superio/nsc/pc8374/early_init.c
+++ b/src/superio/nsc/pc8374/early_init.c
@@ -46,7 +46,7 @@ static void pc8374_enable(u16 iobase, u8 *init)
 	}
 }
 
-static void pc8374_enable_dev(device_t dev, u16 iobase)
+static void pc8374_enable_dev(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
diff --git a/src/superio/nsc/pc87309/early_serial.c b/src/superio/nsc/pc87309/early_serial.c
index 6e48e0c05f..da0d5d7f1b 100644
--- a/src/superio/nsc/pc87309/early_serial.c
+++ b/src/superio/nsc/pc87309/early_serial.c
@@ -22,7 +22,7 @@
 #include <device/pnp_def.h>
 #include "pc87309.h"
 
-void pc87309_enable_serial(device_t dev, u16 iobase)
+void pc87309_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
diff --git a/src/superio/nsc/pc87309/pc87309.h b/src/superio/nsc/pc87309/pc87309.h
index 5f39b6e121..513576ed53 100644
--- a/src/superio/nsc/pc87309/pc87309.h
+++ b/src/superio/nsc/pc87309/pc87309.h
@@ -34,6 +34,6 @@
 #include <arch/io.h>
 #include <stdint.h>
 
-void pc87309_enable_serial(device_t dev, u16 iobase);
+void pc87309_enable_serial(pnp_devfn_t dev, u16 iobase);
 
 #endif /* SUPERIO_NSC_PC87309_H */
diff --git a/src/superio/nsc/pc87351/early_serial.c b/src/superio/nsc/pc87351/early_serial.c
index c34538fd7c..a31f79cb8c 100644
--- a/src/superio/nsc/pc87351/early_serial.c
+++ b/src/superio/nsc/pc87351/early_serial.c
@@ -22,7 +22,7 @@
 #include <arch/io.h>
 #include "pc87351.h"
 
-static void pc87351_enable_serial(device_t dev, u16 iobase)
+static void pc87351_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
diff --git a/src/superio/nsc/pc87360/early_serial.c b/src/superio/nsc/pc87360/early_serial.c
index da4abdb330..3deac3b431 100644
--- a/src/superio/nsc/pc87360/early_serial.c
+++ b/src/superio/nsc/pc87360/early_serial.c
@@ -22,7 +22,7 @@
 #include <arch/io.h>
 #include "pc87360.h"
 
-static void pc87360_enable_serial(device_t dev, u16 iobase)
+static void pc87360_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
diff --git a/src/superio/nsc/pc87366/early_serial.c b/src/superio/nsc/pc87366/early_serial.c
index e173afd632..e663df6021 100644
--- a/src/superio/nsc/pc87366/early_serial.c
+++ b/src/superio/nsc/pc87366/early_serial.c
@@ -22,7 +22,7 @@
 #include <arch/io.h>
 #include "pc87366.h"
 
-static void pc87366_enable_serial(device_t dev, u16 iobase)
+static void pc87366_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
diff --git a/src/superio/nsc/pc87392/early_serial.c b/src/superio/nsc/pc87392/early_serial.c
index 6e85fb96b8..f1e5716aca 100644
--- a/src/superio/nsc/pc87392/early_serial.c
+++ b/src/superio/nsc/pc87392/early_serial.c
@@ -21,7 +21,7 @@
 #include <arch/io.h>
 #include "pc87392.h"
 
-static void pc87392_enable_serial(device_t dev, u16 iobase)
+static void pc87392_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
diff --git a/src/superio/nsc/pc87417/early_init.c b/src/superio/nsc/pc87417/early_init.c
index d1870f9cba..42f8cd15c8 100644
--- a/src/superio/nsc/pc87417/early_init.c
+++ b/src/superio/nsc/pc87417/early_init.c
@@ -23,13 +23,13 @@
 #include <arch/io.h>
 #include "pc87417.h"
 
-static void pc87417_disable_dev(device_t dev)
+static void pc87417_disable_dev(pnp_devfn_t dev)
 {
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
 }
 
-static void pc87417_enable_dev(device_t dev, u16 iobase)
+static void pc87417_enable_dev(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
@@ -37,7 +37,7 @@ static void pc87417_enable_dev(device_t dev, u16 iobase)
 	pnp_set_enable(dev, 1);
 }
 
-static void xbus_cfg(device_t dev)
+static void xbus_cfg(pnp_devfn_t dev)
 {
 	u8 i, data;
 	u16 xbus_index;
diff --git a/src/superio/nsc/pc87417/early_serial.c b/src/superio/nsc/pc87417/early_serial.c
index 33bae7e071..42ba941cb7 100644
--- a/src/superio/nsc/pc87417/early_serial.c
+++ b/src/superio/nsc/pc87417/early_serial.c
@@ -23,7 +23,7 @@
 #include <arch/io.h>
 #include "pc87417.h"
 
-void pc87417_enable_serial(device_t dev, u16 iobase)
+void pc87417_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
@@ -31,7 +31,7 @@ void pc87417_enable_serial(device_t dev, u16 iobase)
 	pnp_set_enable(dev, 1);
 }
 
-void pc87417_enable_dev(device_t dev)
+void pc87417_enable_dev(pnp_devfn_t dev)
 {
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 1);
diff --git a/src/superio/nsc/pc87417/pc87417.h b/src/superio/nsc/pc87417/pc87417.h
index 73c1fbcd76..e7d5413cc7 100644
--- a/src/superio/nsc/pc87417/pc87417.h
+++ b/src/superio/nsc/pc87417/pc87417.h
@@ -115,8 +115,8 @@
 #define PC87417_XWBCNF		0x16
 
 #if defined(__PRE_RAM__)
-void pc87417_enable_serial(device_t dev, u16 iobase);
-void pc87417_enable_dev(device_t dev);
+void pc87417_enable_serial(pnp_devfn_t dev, u16 iobase);
+void pc87417_enable_dev(pnp_devfn_t dev);
 #endif
 
 #endif
diff --git a/src/superio/nsc/pc87427/early_init.c b/src/superio/nsc/pc87427/early_init.c
index 6df1b9f88d..adaa868fa8 100644
--- a/src/superio/nsc/pc87427/early_init.c
+++ b/src/superio/nsc/pc87427/early_init.c
@@ -22,13 +22,13 @@
 #include <arch/io.h>
 #include "pc87427.h"
 
-static void pc87427_disable_dev(device_t dev)
+static void pc87427_disable_dev(pnp_devfn_t dev)
 {
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
 }
 
-static void pc87427_enable_dev(device_t dev, u16 iobase)
+static void pc87427_enable_dev(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
@@ -36,7 +36,7 @@ static void pc87427_enable_dev(device_t dev, u16 iobase)
 	pnp_set_enable(dev, 1);
 }
 
-static void xbus_cfg(device_t dev)
+static void xbus_cfg(pnp_devfn_t dev)
 {
 	u8 i, data;
 	u16 xbus_index;
diff --git a/src/superio/nsc/pc97317/early_serial.c b/src/superio/nsc/pc97317/early_serial.c
index 0c215611bc..ad43010838 100644
--- a/src/superio/nsc/pc97317/early_serial.c
+++ b/src/superio/nsc/pc97317/early_serial.c
@@ -25,7 +25,7 @@
 #define PM_BASE 0xe8
 
 /* The PC97317 needs clocks to be set up before the serial port will operate. */
-static void pc97317_enable_serial(device_t dev, u16 iobase)
+static void pc97317_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	/* Set base address of power management unit. */
 	pnp_set_logical_device(PM_DEV);
diff --git a/src/superio/nuvoton/common/early_serial.c b/src/superio/nuvoton/common/early_serial.c
index 1cbcee8361..dbb0d1394d 100644
--- a/src/superio/nuvoton/common/early_serial.c
+++ b/src/superio/nuvoton/common/early_serial.c
@@ -49,7 +49,7 @@
 
 /* Enable configuration: pass entry key '0x87' into index port dev
  * two times. */
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(NUVOTON_ENTRY_KEY, port);
@@ -57,14 +57,14 @@ static void pnp_enter_conf_state(device_t dev)
 }
 
 /* Disable configuration: pass exit key '0xAA' into index port dev. */
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(NUVOTON_EXIT_KEY, port);
 }
 
 /* Bring up early serial debugging output before the RAM is initialized. */
-void nuvoton_enable_serial(device_t dev, u16 iobase)
+void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/nuvoton/common/nuvoton.h b/src/superio/nuvoton/common/nuvoton.h
index e9e8d4b2c9..43d80a9cad 100644
--- a/src/superio/nuvoton/common/nuvoton.h
+++ b/src/superio/nuvoton/common/nuvoton.h
@@ -25,6 +25,6 @@
 #include <arch/io.h>
 #include <stdint.h>
 
-void nuvoton_enable_serial(device_t dev, u16 iobase);
+void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase);
 
 #endif /* SUPERIO_NUVOTON_COMMON_ROMSTAGE_H */
diff --git a/src/superio/nuvoton/nct5104d/early_init.c b/src/superio/nuvoton/nct5104d/early_init.c
index c9a408ea64..96fac19529 100644
--- a/src/superio/nuvoton/nct5104d/early_init.c
+++ b/src/superio/nuvoton/nct5104d/early_init.c
@@ -28,7 +28,7 @@
 
 /* Enable configuration: pass entry key '0x87' into index port dev
  * two times. */
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(NUVOTON_ENTRY_KEY, port);
@@ -36,14 +36,14 @@ static void pnp_enter_conf_state(device_t dev)
 }
 
 /* Disable configuration: pass exit key '0xAA' into index port dev. */
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(NUVOTON_EXIT_KEY, port);
 }
 
 /* Route UARTD to pins 41-48 */
-void nct5104d_enable_uartd(device_t dev)
+void nct5104d_enable_uartd(pnp_devfn_t dev)
 {
 	u8 tmp;
 	u16 port = dev >> 8;
diff --git a/src/superio/nuvoton/nct5104d/nct5104d.h b/src/superio/nuvoton/nct5104d/nct5104d.h
index e4dcf3836b..5b12cc5b02 100644
--- a/src/superio/nuvoton/nct5104d/nct5104d.h
+++ b/src/superio/nuvoton/nct5104d/nct5104d.h
@@ -48,6 +48,6 @@
 #define NCT5104D_GPIO1 ((1 << 8) | NCT5104D_GPIO_V)
 #define NCT5104D_GPIO6 ((6 << 8) | NCT5104D_GPIO_V)
 
-void nct5104d_enable_uartd(device_t dev);
+void nct5104d_enable_uartd(pnp_devfn_t dev);
 
 #endif /* SUPERIO_NUVOTON_NCT5104D_H */
diff --git a/src/superio/serverengines/pilot/early_init.c b/src/superio/serverengines/pilot/early_init.c
index 002210f97b..66356452e5 100644
--- a/src/superio/serverengines/pilot/early_init.c
+++ b/src/superio/serverengines/pilot/early_init.c
@@ -32,7 +32,7 @@
  * Logical device 4, 5 and 7 are being deactivated. Logical Device 1 seems to
  * be another serial (?), it is also deactivated on the HP machine.
  */
-void pilot_early_init(device_t dev)
+void pilot_early_init(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 
diff --git a/src/superio/serverengines/pilot/early_serial.c b/src/superio/serverengines/pilot/early_serial.c
index 82e124c98c..3e99ef4cb6 100644
--- a/src/superio/serverengines/pilot/early_serial.c
+++ b/src/superio/serverengines/pilot/early_serial.c
@@ -26,20 +26,20 @@
 #include "pilot.h"
 
 /* Pilot uses 0x5A/0xA5 pattern to actiavte deactivate config access. */
-void pnp_enter_ext_func_mode(device_t dev)
+void pnp_enter_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0x5A, port);
 }
 
-void pnp_exit_ext_func_mode(device_t dev)
+void pnp_exit_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0xA5, port);
 }
 
 /* Serial config is a fairly standard procedure. */
-void pilot_enable_serial(device_t dev, u16 iobase)
+void pilot_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_ext_func_mode(dev);
 	pnp_set_logical_device(dev);
@@ -48,7 +48,7 @@ void pilot_enable_serial(device_t dev, u16 iobase)
 	pnp_exit_ext_func_mode(dev);
 }
 
-void pilot_disable_serial(device_t dev)
+void pilot_disable_serial(pnp_devfn_t dev)
 {
 	pnp_enter_ext_func_mode(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/serverengines/pilot/pilot.h b/src/superio/serverengines/pilot/pilot.h
index e19cf37539..cffa2588b0 100644
--- a/src/superio/serverengines/pilot/pilot.h
+++ b/src/superio/serverengines/pilot/pilot.h
@@ -31,12 +31,12 @@
 #define PILOT_LD7 0x07 /* Logical device 7 */
 
 /* should not expose these however early_init needs love */
-void pnp_enter_ext_func_mode(device_t dev);
-void pnp_exit_ext_func_mode(device_t dev);
+void pnp_enter_ext_func_mode(pnp_devfn_t dev);
+void pnp_exit_ext_func_mode(pnp_devfn_t dev);
 
-void pilot_early_init(device_t dev);
+void pilot_early_init(pnp_devfn_t dev);
 
-void pilot_enable_serial(device_t dev, u16 iobase);
-void pilot_disable_serial(device_t dev);
+void pilot_enable_serial(pnp_devfn_t dev, u16 iobase);
+void pilot_disable_serial(pnp_devfn_t dev);
 
 #endif /* SUPERIO_SERVERENGINES_PILOT_PILOT_H */
diff --git a/src/superio/smsc/fdc37m60x/early_serial.c b/src/superio/smsc/fdc37m60x/early_serial.c
index 38cb0f8f27..80258a91d1 100644
--- a/src/superio/smsc/fdc37m60x/early_serial.c
+++ b/src/superio/smsc/fdc37m60x/early_serial.c
@@ -46,7 +46,7 @@ static void fdc37m60x_sio_write(uint8_t ldn, u8 index, u8 value)
 }
 
 /* Enable the peripheral devices on the FDC37M60X Super I/O chip. */
-static void fdc37m60x_enable_serial(device_t dev, u16 iobase)
+static void fdc37m60x_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	/* (1) Enter the configuration state. */
 	outb(0x55, FDC37M60X_CONFIGURATION_PORT);
diff --git a/src/superio/smsc/kbc1100/early_init.c b/src/superio/smsc/kbc1100/early_init.c
index d075f9c2f7..bd42288184 100644
--- a/src/superio/smsc/kbc1100/early_init.c
+++ b/src/superio/smsc/kbc1100/early_init.c
@@ -26,19 +26,19 @@
 
 #include "kbc1100.h"
 
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0x55, port);
 }
 
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0xaa, port);
 }
 
-void kbc1100_early_serial(device_t dev, u16 iobase)
+void kbc1100_early_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
@@ -50,7 +50,7 @@ void kbc1100_early_serial(device_t dev, u16 iobase)
 
 void kbc1100_early_init(u16 port)
 {
-  device_t dev;
+  pnp_devfn_t dev;
   dev = PNP_DEV (port, KBC1100_KBC);
   pnp_enter_conf_state(dev);
 
diff --git a/src/superio/smsc/kbc1100/kbc1100.h b/src/superio/smsc/kbc1100/kbc1100.h
index 2b588f9c91..ec24dd3f9f 100644
--- a/src/superio/smsc/kbc1100/kbc1100.h
+++ b/src/superio/smsc/kbc1100/kbc1100.h
@@ -36,7 +36,7 @@
 #define KBC1100_EC1              0x0D         /* EC Channel 1 */
 #define KBC1100_EC2              0x0E         /* EC Channel 2 */
 
-void kbc1100_early_serial(device_t dev, u16 iobase);
+void kbc1100_early_serial(pnp_devfn_t dev, u16 iobase);
 void kbc1100_early_init(u16 port);
 
 #endif /* SUPERIO_SMSC_KBC1100_H */
diff --git a/src/superio/smsc/lpc47b272/early_serial.c b/src/superio/smsc/lpc47b272/early_serial.c
index b2f0d1b724..3624df272f 100644
--- a/src/superio/smsc/lpc47b272/early_serial.c
+++ b/src/superio/smsc/lpc47b272/early_serial.c
@@ -23,13 +23,13 @@
 #include <arch/io.h>
 #include "lpc47b272.h"
 
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0x55, port);
 }
 
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0xaa, port);
@@ -42,7 +42,7 @@ static void pnp_exit_conf_state(device_t dev)
  * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
  * @param iobase Processor I/O port address to assign to this serial device.
  */
-static void lpc47b272_enable_serial(device_t dev, u16 iobase)
+static void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/smsc/lpc47b397/early_serial.c b/src/superio/smsc/lpc47b397/early_serial.c
index 31d515b5c0..953cd4bbb1 100644
--- a/src/superio/smsc/lpc47b397/early_serial.c
+++ b/src/superio/smsc/lpc47b397/early_serial.c
@@ -23,19 +23,19 @@
 #include <arch/io.h>
 #include "lpc47b397.h"
 
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0x55, port);
 }
 
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0xaa, port);
 }
 
-static void lpc47b397_enable_serial(device_t dev, u16 iobase)
+static void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/smsc/lpc47m10x/early_serial.c b/src/superio/smsc/lpc47m10x/early_serial.c
index fc6efb91d8..1174120136 100644
--- a/src/superio/smsc/lpc47m10x/early_serial.c
+++ b/src/superio/smsc/lpc47m10x/early_serial.c
@@ -21,13 +21,13 @@
 #include <arch/io.h>
 #include "lpc47m10x.h"
 
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0x55, port);
 }
 
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0xaa, port);
@@ -40,7 +40,7 @@ static void pnp_exit_conf_state(device_t dev)
  * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
  * @param iobase Processor I/O port address to assign to this serial device.
  */
-static void lpc47m10x_enable_serial(device_t dev, u16 iobase)
+static void lpc47m10x_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/smsc/lpc47m15x/early_serial.c b/src/superio/smsc/lpc47m15x/early_serial.c
index 5686f52106..0a42ad3206 100644
--- a/src/superio/smsc/lpc47m15x/early_serial.c
+++ b/src/superio/smsc/lpc47m15x/early_serial.c
@@ -25,19 +25,19 @@
 
 #include "lpc47m15x.h"
 
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0x55, port);
 }
 
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0xaa, port);
 }
 
-void lpc47m15x_enable_serial(device_t dev, u16 iobase)
+void lpc47m15x_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/smsc/lpc47m15x/lpc47m15x.h b/src/superio/smsc/lpc47m15x/lpc47m15x.h
index 32cff48f01..ee9e9c675a 100644
--- a/src/superio/smsc/lpc47m15x/lpc47m15x.h
+++ b/src/superio/smsc/lpc47m15x/lpc47m15x.h
@@ -34,6 +34,6 @@
 #include <arch/io.h>
 #include <stdint.h>
 
-void lpc47m15x_enable_serial(device_t dev, u16 iobase);
+void lpc47m15x_enable_serial(pnp_devfn_t dev, u16 iobase);
 
 #endif /* SUPERIO_SMSC_LPC47M15X_H */
diff --git a/src/superio/smsc/lpc47n217/early_serial.c b/src/superio/smsc/lpc47n217/early_serial.c
index 451628a449..7405f3296c 100644
--- a/src/superio/smsc/lpc47n217/early_serial.c
+++ b/src/superio/smsc/lpc47n217/early_serial.c
@@ -24,13 +24,13 @@
 #include <assert.h>
 #include "lpc47n217.h"
 
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0x55, port);
 }
 
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0xaa, port);
@@ -42,7 +42,7 @@ static void pnp_exit_conf_state(device_t dev)
  * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
  * @param iobase Base I/O port for the logical device.
  */
-static void lpc47n217_pnp_set_iobase(device_t dev, u16 iobase)
+static void lpc47n217_pnp_set_iobase(pnp_devfn_t dev, u16 iobase)
 {
 	/* LPC47N217 requires base ports to be a multiple of 4. */
 	ASSERT(!(iobase & 0x3));
@@ -74,7 +74,7 @@ static void lpc47n217_pnp_set_iobase(device_t dev, u16 iobase)
  * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
  * @param enable 0 to disable, anythig else to enable.
  */
-static void lpc47n217_pnp_set_enable(device_t dev, int enable)
+static void lpc47n217_pnp_set_enable(pnp_devfn_t dev, int enable)
 {
 	u8 power_register = 0, power_mask = 0, current_power, new_power;
 
@@ -109,7 +109,7 @@ static void lpc47n217_pnp_set_enable(device_t dev, int enable)
  * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
  * @param iobase Processor I/O port address to assign to this serial device.
  */
-static void lpc47n217_enable_serial(device_t dev, u16 iobase)
+static void lpc47n217_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	/*
 	 * NOTE: Cannot use pnp_set_XXX() here because they assume chip
diff --git a/src/superio/smsc/lpc47n227/early_serial.c b/src/superio/smsc/lpc47n227/early_serial.c
index 4aea7c57fc..64a6d84a2c 100644
--- a/src/superio/smsc/lpc47n227/early_serial.c
+++ b/src/superio/smsc/lpc47n227/early_serial.c
@@ -23,13 +23,13 @@
 #include <arch/io.h>
 #include "lpc47n227.h"
 
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0x55, port);
 }
 
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0xaa, port);
@@ -41,7 +41,7 @@ static void pnp_exit_conf_state(device_t dev)
  * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
  * @param iobase Base I/O port for the logical device.
  */
-static void lpc47n227_pnp_set_iobase(device_t dev, u16 iobase)
+static void lpc47n227_pnp_set_iobase(pnp_devfn_t dev, u16 iobase)
 {
 	/* LPC47N227 requires base ports to be a multiple of 4. */
 	/* it's not very useful to do an ASSERT here: if it trips,
@@ -76,7 +76,7 @@ static void lpc47n227_pnp_set_iobase(device_t dev, u16 iobase)
  * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
  * @param enable 0 to disable, anythig else to enable.
  */
-static void lpc47n227_pnp_set_enable(device_t dev, int enable)
+static void lpc47n227_pnp_set_enable(pnp_devfn_t dev, int enable)
 {
 	u8 power_register = 0, power_mask = 0, current_power, new_power;
 
@@ -111,7 +111,7 @@ static void lpc47n227_pnp_set_enable(device_t dev, int enable)
  * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
  * @param iobase Processor I/O port address to assign to this serial device.
  */
-static void lpc47n227_enable_serial(device_t dev, u16 iobase)
+static void lpc47n227_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	/*
 	 * NOTE: Cannot use pnp_set_XXX() here because they assume chip
diff --git a/src/superio/smsc/sch4037/sch4037_early_init.c b/src/superio/smsc/sch4037/sch4037_early_init.c
index 099e5f27c6..56af87aafc 100644
--- a/src/superio/smsc/sch4037/sch4037_early_init.c
+++ b/src/superio/smsc/sch4037/sch4037_early_init.c
@@ -24,13 +24,13 @@
 
 #include "sch4037.h"
 
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
 {
 	unsigned port = dev >> 8;
 	outb(0x55, port);
 }
 
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
 {
 	unsigned port = dev >> 8;
 	outb(0xaa, port);
@@ -38,7 +38,7 @@ static void pnp_exit_conf_state(device_t dev)
 
 void sch4037_early_init(unsigned port)
 {
-	device_t dev;
+	pnp_devfn_t dev;
 
 	dev = PNP_DEV(port, SMSCSUPERIO_SP1);
 	pnp_enter_conf_state(dev);
diff --git a/src/superio/smsc/sio1036/sio1036.h b/src/superio/smsc/sio1036/sio1036.h
index fa52a1a5c8..ba7a9327fc 100644
--- a/src/superio/smsc/sio1036/sio1036.h
+++ b/src/superio/smsc/sio1036/sio1036.h
@@ -29,6 +29,6 @@
 #include <arch/io.h>
 #include <stdint.h>
 
-void sio1036_enable_serial(device_t dev, u16 iobase);
+void sio1036_enable_serial(pnp_devfn_t dev, u16 iobase);
 
 #endif /* SUPERIO_SMSC_1306_H */
diff --git a/src/superio/smsc/sio1036/sio1036_early_init.c b/src/superio/smsc/sio1036/sio1036_early_init.c
index 5f10230c84..b37e81b974 100644
--- a/src/superio/smsc/sio1036/sio1036_early_init.c
+++ b/src/superio/smsc/sio1036/sio1036_early_init.c
@@ -24,13 +24,13 @@
 
 #include "sio1036.h"
 
-static inline void sio1036_enter_conf_state(device_t dev)
+static inline void sio1036_enter_conf_state(pnp_devfn_t dev)
 {
 	unsigned port = dev >> 8;
 	outb(0x55, port);
 }
 
-static inline void sio1036_exit_conf_state(device_t dev)
+static inline void sio1036_exit_conf_state(pnp_devfn_t dev)
 {
 	unsigned port = dev >> 8;
 	outb(0xaa, port);
@@ -39,7 +39,7 @@ static inline void sio1036_exit_conf_state(device_t dev)
 /* Detect SMSC SIO1036 LPC Debug Card status */
 static u8 detect_sio1036_chip(unsigned port)
 {
-	device_t dev = PNP_DEV(port, SIO1036_SP1);
+	pnp_devfn_t dev = PNP_DEV(port, SIO1036_SP1);
 	unsigned data;
 
 	sio1036_enter_conf_state (dev);
@@ -56,7 +56,7 @@ static u8 detect_sio1036_chip(unsigned port)
 	};
 }
 
-void sio1036_enable_serial(device_t dev, u16 iobase)
+void sio1036_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	unsigned port = dev >> 8;
 
diff --git a/src/superio/smsc/smscsuperio/early_serial.c b/src/superio/smsc/smscsuperio/early_serial.c
index e2eea6d719..c058ef5089 100644
--- a/src/superio/smsc/smscsuperio/early_serial.c
+++ b/src/superio/smsc/smscsuperio/early_serial.c
@@ -29,14 +29,14 @@
 #define SMSC_EXIT_KEY 0xAA
 
 /* Enable configuration: pass entry key '0x87' into index port dev. */
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(SMSC_ENTRY_KEY, port);
 }
 
 /* Disable configuration: pass exit key '0xAA' into index port dev. */
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(SMSC_EXIT_KEY, port);
@@ -49,7 +49,7 @@ static void pnp_exit_conf_state(device_t dev)
  * @param dev The device to use.
  * @param iobase The I/O base of the serial port (usually 0x3f8/0x2f8).
  */
-void smscsuperio_enable_serial(device_t dev, u16 iobase)
+void smscsuperio_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/smsc/smscsuperio/smscsuperio.h b/src/superio/smsc/smscsuperio/smscsuperio.h
index 60a58e68bc..8a761ba1f1 100644
--- a/src/superio/smsc/smscsuperio/smscsuperio.h
+++ b/src/superio/smsc/smscsuperio/smscsuperio.h
@@ -30,6 +30,6 @@
 #define SMSCSUPERIO_SP1 4	/* Com1 */
 #define SMSCSUPERIO_SP2 5	/* Com2 */
 
-void smscsuperio_enable_serial(device_t dev, u16 iobase);
+void smscsuperio_enable_serial(pnp_devfn_t dev, u16 iobase);
 
 #endif /* SUPERIO_SMSC_SMSCSUPERIO_H */
diff --git a/src/superio/winbond/common/early_serial.c b/src/superio/winbond/common/early_serial.c
index 747cc458d0..fd51cd583a 100644
--- a/src/superio/winbond/common/early_serial.c
+++ b/src/superio/winbond/common/early_serial.c
@@ -46,7 +46,7 @@
 #define WINBOND_EXIT_KEY 0xAA
 
 /* Enable configuration: pass entry key '0x87' into index port dev. */
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(WINBOND_ENTRY_KEY, port);
@@ -54,14 +54,14 @@ static void pnp_enter_conf_state(device_t dev)
 }
 
 /* Disable configuration: pass exit key '0xAA' into index port dev. */
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(WINBOND_EXIT_KEY, port);
 }
 
 /* Bring up early serial debugging output before the RAM is initialized. */
-void winbond_enable_serial(device_t dev, u16 iobase)
+void winbond_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/winbond/common/winbond.h b/src/superio/winbond/common/winbond.h
index 20eefc8029..0f937c1d54 100644
--- a/src/superio/winbond/common/winbond.h
+++ b/src/superio/winbond/common/winbond.h
@@ -24,6 +24,6 @@
 #include <arch/io.h>
 #include <stdint.h>
 
-void winbond_enable_serial(device_t dev, u16 iobase);
+void winbond_enable_serial(pnp_devfn_t dev, u16 iobase);
 
 #endif /* SUPERIO_WINBOND_COMMON_ROMSTAGE_H */
diff --git a/src/superio/winbond/w83627dhg/early_serial.c b/src/superio/winbond/w83627dhg/early_serial.c
index 67aaa93343..83f8e34278 100644
--- a/src/superio/winbond/w83627dhg/early_serial.c
+++ b/src/superio/winbond/w83627dhg/early_serial.c
@@ -24,14 +24,14 @@
 #include <stdint.h>
 #include "w83627dhg.h"
 
-void pnp_enter_ext_func_mode(device_t dev)
+void pnp_enter_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0x87, port);
 	outb(0x87, port);
 }
 
-void pnp_exit_ext_func_mode(device_t dev)
+void pnp_exit_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0xaa, port);
@@ -42,7 +42,7 @@ void pnp_exit_ext_func_mode(device_t dev)
  *  {Pin 89, Pin 90} function can be selected as {GP33, GP32}, or
  *  {RSTOUT3#, RSTOUT2#} or {SDA, SCL}
  */
-void w83627dhg_enable_i2c(device_t dev)
+void w83627dhg_enable_i2c(pnp_devfn_t dev)
 {
 	u8 val;
 
@@ -56,7 +56,7 @@ void w83627dhg_enable_i2c(device_t dev)
 	pnp_exit_ext_func_mode(dev);
 }
 
-void w83627dhg_set_clksel_48(device_t dev)
+void w83627dhg_set_clksel_48(pnp_devfn_t dev)
 {
 	u8 reg8;
 
diff --git a/src/superio/winbond/w83627dhg/w83627dhg.h b/src/superio/winbond/w83627dhg/w83627dhg.h
index 08ea04fa2a..c4ead34e33 100644
--- a/src/superio/winbond/w83627dhg/w83627dhg.h
+++ b/src/superio/winbond/w83627dhg/w83627dhg.h
@@ -52,9 +52,9 @@
 
 /* Note: There is no GPIO1 on the W83627DHG as per datasheet. */
 
-void pnp_enter_ext_func_mode(device_t dev);
-void pnp_exit_ext_func_mode(device_t dev);
-void w83627dhg_enable_i2c(device_t dev);
-void w83627dhg_set_clksel_48(device_t dev);
+void pnp_enter_ext_func_mode(pnp_devfn_t dev);
+void pnp_exit_ext_func_mode(pnp_devfn_t dev);
+void w83627dhg_enable_i2c(pnp_devfn_t dev);
+void w83627dhg_set_clksel_48(pnp_devfn_t dev);
 
 #endif /* SUPERIO_WINBOND_W83627DHG_H */
diff --git a/src/superio/winbond/w83627ehg/early_serial.c b/src/superio/winbond/w83627ehg/early_serial.c
index 346d6cf094..e052863694 100644
--- a/src/superio/winbond/w83627ehg/early_serial.c
+++ b/src/superio/winbond/w83627ehg/early_serial.c
@@ -23,14 +23,14 @@
 #include <device/pnp.h>
 #include "w83627ehg.h"
 
-void pnp_enter_ext_func_mode(device_t dev)
+void pnp_enter_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0x87, port);
 	outb(0x87, port);
 }
 
-void pnp_exit_ext_func_mode(device_t dev)
+void pnp_exit_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0xaa, port);
diff --git a/src/superio/winbond/w83627ehg/w83627ehg.h b/src/superio/winbond/w83627ehg/w83627ehg.h
index 221de7b889..3d6f56f577 100644
--- a/src/superio/winbond/w83627ehg/w83627ehg.h
+++ b/src/superio/winbond/w83627ehg/w83627ehg.h
@@ -54,7 +54,7 @@
 #define W83627EHG_GPIO4	((2 << 8) | W83627EHG_GPIO_SUSLED_V)
 #define W83627EHG_GPIO5	((3 << 8) | W83627EHG_GPIO_SUSLED_V)
 
-void pnp_enter_ext_func_mode(device_t dev);
-void pnp_exit_ext_func_mode(device_t dev);
+void pnp_enter_ext_func_mode(pnp_devfn_t dev);
+void pnp_exit_ext_func_mode(pnp_devfn_t dev);
 
 #endif /* SUPERIO_WINBOND_W83627EHG_H */
diff --git a/src/superio/winbond/w83627hf/early_init.c b/src/superio/winbond/w83627hf/early_init.c
index db616aee38..2e275e61cc 100644
--- a/src/superio/winbond/w83627hf/early_init.c
+++ b/src/superio/winbond/w83627hf/early_init.c
@@ -25,14 +25,14 @@
 #include <device/pnp.h>
 #include "w83627hf.h"
 
-static void pnp_enter_ext_func_mode(device_t dev)
+static void pnp_enter_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0x87, port);
 	outb(0x87, port);
 }
 
-static void pnp_exit_ext_func_mode(device_t dev)
+static void pnp_exit_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0xaa, port);
@@ -43,7 +43,7 @@ static void pnp_exit_ext_func_mode(device_t dev)
  * work around a limitation of ROMCC where we can no make early_serial.c into
  * link-time symbols and #include early_serial.c.
  */
-void w83627hf_set_clksel_48(device_t dev)
+void w83627hf_set_clksel_48(pnp_devfn_t dev)
 {
 	u8 reg8;
 
diff --git a/src/superio/winbond/w83627hf/early_serial.c b/src/superio/winbond/w83627hf/early_serial.c
index bc251a67e3..694a3fe14d 100644
--- a/src/superio/winbond/w83627hf/early_serial.c
+++ b/src/superio/winbond/w83627hf/early_serial.c
@@ -24,14 +24,14 @@
 #include <arch/io.h>
 #include "w83627hf.h"
 
-static void pnp_enter_ext_func_mode(device_t dev)
+static void pnp_enter_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0x87, port);
 	outb(0x87, port);
 }
 
-static void pnp_exit_ext_func_mode(device_t dev)
+static void pnp_exit_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0xaa, port);
@@ -49,7 +49,7 @@ static void pnp_exit_ext_func_mode(device_t dev)
  * XXX: ROMCC -  everything is inlined, no forwarding function prototypes
  * declarations are accepted.
  */
-void w83627hf_enable_serial(device_t dev, u16 iobase)
+void w83627hf_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_ext_func_mode(dev);
 	pnp_set_logical_device(dev);
@@ -59,7 +59,7 @@ void w83627hf_enable_serial(device_t dev, u16 iobase)
 	pnp_exit_ext_func_mode(dev);
 }
 
-void w83627hf_set_clksel_48(device_t dev)
+void w83627hf_set_clksel_48(pnp_devfn_t dev)
 {
 	u8 reg8;
 
diff --git a/src/superio/winbond/w83627hf/w83627hf.h b/src/superio/winbond/w83627hf/w83627hf.h
index bf7186ea4a..6eeb62bdd1 100644
--- a/src/superio/winbond/w83627hf/w83627hf.h
+++ b/src/superio/winbond/w83627hf/w83627hf.h
@@ -115,7 +115,7 @@
 
 #include <arch/io.h>
 
-void w83627hf_set_clksel_48(device_t dev);
-void w83627hf_enable_serial(device_t dev, u16 iobase);
+void w83627hf_set_clksel_48(pnp_devfn_t dev);
+void w83627hf_enable_serial(pnp_devfn_t dev, u16 iobase);
 
 #endif /* SUPERIO_WINBOND_W83627HF_H */
diff --git a/src/superio/winbond/w83627thg/w83627thg.h b/src/superio/winbond/w83627thg/w83627thg.h
index ec857d3910..8d8537941b 100644
--- a/src/superio/winbond/w83627thg/w83627thg.h
+++ b/src/superio/winbond/w83627thg/w83627thg.h
@@ -34,9 +34,9 @@
 #define W83627THG_ACPI            10
 #define W83627THG_HWM             11   /* Hardware monitor */
 
-void pnp_enter_ext_func_mode(device_t dev);
-void pnp_exit_ext_func_mode(device_t dev);
+void pnp_enter_ext_func_mode(pnp_devfn_t dev);
+void pnp_exit_ext_func_mode(pnp_devfn_t dev);
 
-void w83627thg_set_clksel_48(device_t dev);
+void w83627thg_set_clksel_48(pnp_devfn_t dev);
 
 #endif /* SUPERIO_WINBOND_W83627THG_W83627THG_H */
diff --git a/src/superio/winbond/w83697hf/early_serial.c b/src/superio/winbond/w83697hf/early_serial.c
index 6c00b2765a..515fee95bc 100644
--- a/src/superio/winbond/w83697hf/early_serial.c
+++ b/src/superio/winbond/w83697hf/early_serial.c
@@ -22,20 +22,20 @@
 #include <device/pnp_def.h>
 #include "w83697hf.h"
 
-static void pnp_enter_ext_func_mode(device_t dev)
+static void pnp_enter_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0x87, port);
 	outb(0x87, port);
 }
 
-static void pnp_exit_ext_func_mode(device_t dev)
+static void pnp_exit_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0xaa, port);
 }
 
-void w83697hf_set_clksel_48(device_t dev)
+void w83697hf_set_clksel_48(pnp_devfn_t dev)
 {
 	u8 reg8;
 
@@ -47,7 +47,7 @@ void w83697hf_set_clksel_48(device_t dev)
 }
 
 /* Depreciated, use winbond_enable_serial() */
-void w83697hf_enable_serial(device_t dev, u16 iobase)
+void w83697hf_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_ext_func_mode(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/winbond/w83697hf/w83697hf.h b/src/superio/winbond/w83697hf/w83697hf.h
index f711786563..3bd1f44b74 100644
--- a/src/superio/winbond/w83697hf/w83697hf.h
+++ b/src/superio/winbond/w83697hf/w83697hf.h
@@ -34,9 +34,9 @@
 #define W83697HF_ACPI           10   /* ACPI */
 #define W83697HF_HWM            11   /* Hardware monitor */
 
-void w83697hf_set_clksel_48(device_t);
+void w83697hf_set_clksel_48(pnp_devfn_t);
 
 /* Depreciated, use winbond_enable_serial() */
-void w83697hf_enable_serial(device_t dev, u16 iobase);
+void w83697hf_enable_serial(pnp_devfn_t dev, u16 iobase);
 
 #endif /* SUPERIO_WINBOND_W83697HF_H */
diff --git a/src/superio/winbond/w83977f/early_serial.c b/src/superio/winbond/w83977f/early_serial.c
index c572dcb959..9b5785d961 100644
--- a/src/superio/winbond/w83977f/early_serial.c
+++ b/src/superio/winbond/w83977f/early_serial.c
@@ -21,20 +21,20 @@
 #include <arch/io.h>
 #include "w83977f.h"
 
-static void pnp_enter_ext_func_mode(device_t dev)
+static void pnp_enter_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0x87, port);
 	outb(0x87, port);
 }
 
-static void pnp_exit_ext_func_mode(device_t dev)
+static void pnp_exit_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0xaa, port);
 }
 
-static void w83977f_enable_serial(device_t dev, u16 iobase)
+static void w83977f_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_ext_func_mode(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/winbond/w83977tf/early_serial.c b/src/superio/winbond/w83977tf/early_serial.c
index c016515531..866d9f2787 100644
--- a/src/superio/winbond/w83977tf/early_serial.c
+++ b/src/superio/winbond/w83977tf/early_serial.c
@@ -23,20 +23,20 @@
 #include <arch/io.h>
 #include "w83977tf.h"
 
-static void pnp_enter_ext_func_mode(device_t dev)
+static void pnp_enter_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0x87, port);
 	outb(0x87, port);
 }
 
-static void pnp_exit_ext_func_mode(device_t dev)
+static void pnp_exit_ext_func_mode(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 	outb(0xaa, port);
 }
 
-static void w83977tf_enable_serial(device_t dev, u16 iobase)
+static void w83977tf_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_ext_func_mode(dev);
 	pnp_set_logical_device(dev);