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| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-06-02 20:18:44 -0500 |
|---|---|---|
| committer | Peter Stuge <peter@stuge.se> | 2015-11-08 01:18:19 +0100 |
| commit | 8bd1c36abbc1399e4e9359a53df416e56868fe90 (patch) | |
| tree | e2f3d501e4abd833e7f022fad86fdc68c7f163cc /src | |
| parent | 6ee6bdec258bcd76ee690a20856a3d7e79b31a04 (diff) | |
| download | coreboot-8bd1c36abbc1399e4e9359a53df416e56868fe90.tar.xz | |
cpu/amd/family_10h-family_15h: Increase BSP stack size
The additional local data storage requirements of the full DDR3
DRAM training algorithm make a BSP stack overrun a distint
possibility. Increase the BSP stack size to compensate.
Change-Id: I51af31442f2b77cb64a4b788751ccc7186acb283
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11972
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
Diffstat (limited to 'src')
| -rw-r--r-- | src/cpu/amd/family_10h-family_15h/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig index 7c47e27ca2..81b1d1e1bd 100644 --- a/src/cpu/amd/family_10h-family_15h/Kconfig +++ b/src/cpu/amd/family_10h-family_15h/Kconfig @@ -33,7 +33,7 @@ config DCACHE_RAM_SIZE config DCACHE_BSP_STACK_SIZE hex - default 0x2000 + default 0x4000 config DCACHE_BSP_STACK_SLUSH hex |