diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-11-10 21:09:25 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-11-12 04:07:06 +0100 |
| commit | 96b3c6f937326d3715a9e50c63112ed9b8292526 (patch) | |
| tree | 680f5f88fd1a8708e05472da1d1beb474ec58336 /src | |
| parent | bf696f56021b26596121b060df6bb2f4172231eb (diff) | |
| download | coreboot-96b3c6f937326d3715a9e50c63112ed9b8292526.tar.xz | |
drivers/intel/fsp2_0: track end of firmware notifications
The end of firmware notification is currently not being tracked
so it's hard to get good data on how long it takes. Update the
code to provide timestamp data as well as post codes.
BUG=chrome-os-partner:56656
Change-Id: I74c1043f2e72d9d85b23a99b8253ac465f62a7f2
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/17373
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/commonlib/include/commonlib/timestamp_serialized.h | 7 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/notify.c | 6 | ||||
| -rw-r--r-- | src/include/console/post_codes.h | 14 |
3 files changed, 26 insertions, 1 deletions
diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h index aec93c4ed6..29f5e0d6a0 100644 --- a/src/commonlib/include/commonlib/timestamp_serialized.h +++ b/src/commonlib/include/commonlib/timestamp_serialized.h @@ -86,6 +86,8 @@ enum timestamp_id { TS_FSP_AFTER_ENUMERATE = 957, TS_FSP_BEFORE_FINALIZE = 958, TS_FSP_AFTER_FINALIZE = 959, + TS_FSP_BEFORE_END_OF_FIRMWARE = 960, + TS_FSP_AFTER_END_OF_FIRMWARE = 961, /* 1000+ reserved for payloads (1000-1200: ChromeOS depthcharge) */ @@ -183,7 +185,10 @@ static const struct timestamp_id_to_name { { TS_FSP_AFTER_ENUMERATE, "returning from FspNotify(AfterPciEnumeration)" }, { TS_FSP_BEFORE_FINALIZE, "calling FspNotify(ReadyToBoot)" }, - { TS_FSP_AFTER_FINALIZE, "returning from FspNotify(ReadyToBoot)" } + { TS_FSP_AFTER_FINALIZE, "returning from FspNotify(ReadyToBoot)" }, + { TS_FSP_BEFORE_END_OF_FIRMWARE, "calling FspNotify(EndOfFirmware)" }, + { TS_FSP_AFTER_END_OF_FIRMWARE, + "returning from FspNotify(EndOfFirmware)" }, }; #endif diff --git a/src/drivers/intel/fsp2_0/notify.c b/src/drivers/intel/fsp2_0/notify.c index 840165375c..09d335f3c9 100644 --- a/src/drivers/intel/fsp2_0/notify.c +++ b/src/drivers/intel/fsp2_0/notify.c @@ -37,6 +37,9 @@ static void fsp_notify(enum fsp_notify_phase phase) } else if (phase == READY_TO_BOOT) { timestamp_add_now(TS_FSP_BEFORE_FINALIZE); post_code(POST_FSP_NOTIFY_BEFORE_FINALIZE); + } else if (phase == END_OF_FIRMWARE) { + timestamp_add_now(TS_FSP_BEFORE_END_OF_FIRMWARE); + post_code(POST_FSP_NOTIFY_BEFORE_END_OF_FIRMWARE); } ret = fspnotify(¬ify_params); @@ -47,6 +50,9 @@ static void fsp_notify(enum fsp_notify_phase phase) } else if (phase == READY_TO_BOOT) { timestamp_add_now(TS_FSP_AFTER_FINALIZE); post_code(POST_FSP_NOTIFY_BEFORE_FINALIZE); + } else if (phase == END_OF_FIRMWARE) { + timestamp_add_now(TS_FSP_AFTER_END_OF_FIRMWARE); + post_code(POST_FSP_NOTIFY_AFTER_END_OF_FIRMWARE); } fsp_debug_after_notify(ret); diff --git a/src/include/console/post_codes.h b/src/include/console/post_codes.h index c7722e5faf..9f24199cb7 100644 --- a/src/include/console/post_codes.h +++ b/src/include/console/post_codes.h @@ -203,6 +203,20 @@ #define POST_BS_PAYLOAD_BOOT 0x7b /** + * \brief Before calling FSP Notify before End of Firmware + * + * Going to call into FSP binary for Notify phase + */ +#define POST_FSP_NOTIFY_BEFORE_END_OF_FIRMWARE 0x88 + +/** + * \brief Before calling FSP Notify after End of Firmware + * + * Going to call into FSP binary for Notify phase + */ +#define POST_FSP_NOTIFY_AFTER_END_OF_FIRMWARE 0x89 + +/** * \brief Before calling FSP TempRamInit * * Going to call into FSP binary for TempRamInit phase |