diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-28 23:26:13 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-04 11:40:25 +0000 |
commit | a1b700ff74981ecb84e47e132a60d7f0d5312676 (patch) | |
tree | 97af20e80157b51857e0fa97ec2834b623ed9c84 /src | |
parent | 879c9fc4210fa508fdc7e23e6a53709d5751d513 (diff) | |
download | coreboot-a1b700ff74981ecb84e47e132a60d7f0d5312676.tar.xz |
arch/mips: Pass cbmem_top to ramstage via calling argument
This allows to use a common cbmem_top implementation.
Change-Id: I85efe3899607854c36d0ec594868f690eb724a7f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36421
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/mips/Kconfig | 1 | ||||
-rw-r--r-- | src/arch/mips/include/arch/stages.h | 3 | ||||
-rw-r--r-- | src/arch/mips/stages.c | 5 | ||||
-rw-r--r-- | src/soc/imgtec/pistachio/Makefile.inc | 1 |
4 files changed, 7 insertions, 3 deletions
diff --git a/src/arch/mips/Kconfig b/src/arch/mips/Kconfig index 9df514b21b..321bfc91fd 100644 --- a/src/arch/mips/Kconfig +++ b/src/arch/mips/Kconfig @@ -22,6 +22,7 @@ config ARCH_BOOTBLOCK_MIPS default n select BOOTBLOCK_CUSTOM select C_ENVIRONMENT_BOOTBLOCK + select RAMSTAGE_CBMEM_TOP_ARG config ARCH_VERSTAGE_MIPS bool diff --git a/src/arch/mips/include/arch/stages.h b/src/arch/mips/include/arch/stages.h index 63306bd783..3da02da1ca 100644 --- a/src/arch/mips/include/arch/stages.h +++ b/src/arch/mips/include/arch/stages.h @@ -14,8 +14,9 @@ #ifndef __MIPS_ARCH_STAGES_H #define __MIPS_ARCH_STAGES_H +#include <stdint.h> #include <main_decl.h> -void stage_entry(void); +void stage_entry(uintptr_t stage_arg); #endif /* __MIPS_ARCH_STAGES_H */ diff --git a/src/arch/mips/stages.c b/src/arch/mips/stages.c index 0971e98905..bf31153d98 100644 --- a/src/arch/mips/stages.c +++ b/src/arch/mips/stages.c @@ -11,10 +11,13 @@ * GNU General Public License for more details. */ +#include <cbmem.h> #include <arch/stages.h> #include <arch/cache.h> -void stage_entry(void) +void stage_entry(uintptr_t stage_arg) { + if (!ENV_ROMSTAGE_OR_BEFORE) + _cbmem_top_ptr = stage_arg; main(); } diff --git a/src/soc/imgtec/pistachio/Makefile.inc b/src/soc/imgtec/pistachio/Makefile.inc index 6e8d539d8e..9392d302a2 100644 --- a/src/soc/imgtec/pistachio/Makefile.inc +++ b/src/soc/imgtec/pistachio/Makefile.inc @@ -28,7 +28,6 @@ ramstage-y += uart.c bootblock-y += monotonic_timer.c -ramstage-y += cbmem.c ramstage-y += monotonic_timer.c ramstage-y += soc.c ramstage-y += reset.c |