diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2011-11-23 16:33:12 +0200 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2011-12-08 10:42:39 +0100 |
| commit | b192df4d97978b3f21676756714a37531a45dc08 (patch) | |
| tree | d0d1d19c3f1d45766e905d20dbf0ac2e4c871126 /src | |
| parent | 4c132bbc512fae6fe1cb36b35844e2f4956587ed (diff) | |
| download | coreboot-b192df4d97978b3f21676756714a37531a45dc08.tar.xz | |
Fix ldscript for bootblock .rom section
Allocation size for the section was miscalculated, so the section
did not honour its upper-bound address.
Also align the section start to 4 bytes, so it starts with code
instead of pad bytes.
Change-Id: Ic2a43981836a0873b50abecfcad2def7b6586a5d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/453
Tested-by: build bot (Jenkins)
Reviewed-by: Alec Ari <neotheuser@ymail.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/x86/init/ldscript_failover.lb | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/src/arch/x86/init/ldscript_failover.lb b/src/arch/x86/init/ldscript_failover.lb index 7e48dc1a25..83e5eb3432 100644 --- a/src/arch/x86/init/ldscript_failover.lb +++ b/src/arch/x86/init/ldscript_failover.lb @@ -29,6 +29,14 @@ MEMORY { TARGET(binary) SECTIONS { + /* Align .rom to next 4 byte boundary so no pad byte appears + * between _rom and _start. + */ + .bogus ROMLOC_MIN : { + . = ALIGN(4); + ROMLOC = .; + } >rom = 0xff + /* This section might be better named .setup */ .rom ROMLOC : { _rom = .; @@ -39,7 +47,11 @@ SECTIONS _erom = .; } >rom = 0xff - ROMLOC = 0xffffff00 - (_erom - _rom) + 1; + /* Allocation reserves extra 16 bytes here. Alignment requirements + * may cause the total size of a section to change when the start + * address gets applied. + */ + ROMLOC_MIN = 0xffffff00 - (_erom - _rom + 16); /DISCARD/ : { *(.comment) |