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author | Paul Menzel <paulepanter@users.sourceforge.net> | 2013-07-30 04:17:37 -0600 |
---|---|---|
committer | Bruce Griffith <Bruce.Griffith@se-eng.com> | 2013-08-06 19:40:38 +0200 |
commit | cec611a0ea6dc3bb79e409f3f49a58ec1db81dc1 (patch) | |
tree | 45afd8ebd7cdbf630c357a4c8de0a2d1e4db46dc /src | |
parent | 5697df2a84b52f0979d4807fc293dea311e46662 (diff) | |
download | coreboot-cec611a0ea6dc3bb79e409f3f49a58ec1db81dc1.tar.xz |
AMD AGESA: Fix comment for `PCIE_DDI_DATA_INITIALIZER`
Copied from a similar commit for Family 10h AGESA [1]
Remove the fourth argument in the comments. Luckily the compiler,
at least gcc, warns about a wrong number of arguments, and therefore
no incorrect code resulted from the wrong documentation.
[1] 07e0f1b AMD AGESA: Fix argument list for `PCIE_DDI_DATA_INITIALIZER` in comments
[2] fc47bfa Revert "AMD f14 vendorcode: Fix warning"
Change-Id: I3806e368a823e4a40d22e99b91bf3598d9ed2f15
Signed-off-by: Bruce Griffith <bruce.griffith@se-eng.com>
Reviewed-on: http://review.coreboot.org/3840
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martin@se-eng.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/vendorcode/amd/agesa/f16kb/AGESA.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/vendorcode/amd/agesa/f16kb/AGESA.h b/src/vendorcode/amd/agesa/f16kb/AGESA.h index 34dc3b63b9..d71250c8e9 100644 --- a/src/vendorcode/amd/agesa/f16kb/AGESA.h +++ b/src/vendorcode/amd/agesa/f16kb/AGESA.h @@ -1305,13 +1305,13 @@ typedef struct { * { * 0, //Descriptor flags * PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 27), - * PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1, 0) + * PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1) * }, * // Initialize Ddi descriptor (DDI interface Lanes 28:31, HDMI, ...) * { * DESCRIPTOR_TERMINATE_LIST, //Descriptor flags !!!IMPORTANT!!! Terminate last element of array * PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 28, 31), - * PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2, 0) + * PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2) * } * }; * PCIe_COMPLEX_DESCRIPTOR PlatformTopology = { |