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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-04 07:22:56 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-03-06 11:38:20 +0000 |
| commit | e459a89f0f30e705c35855d49f62b67d87092f18 (patch) | |
| tree | 90a6fd1dfb428c392619442e47489266c7187bdc /src | |
| parent | c8b4d217d0679166486d1c830db244b05a8354fd (diff) | |
| download | coreboot-e459a89f0f30e705c35855d49f62b67d87092f18.tar.xz | |
soc/intel: Use simple PCI config access
Call the simple PCI config accessors directly.
Change-Id: I2c6712d836924b01c33a8435292be1ac2e530472
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31749
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/baytrail/iosf.c | 20 | ||||
| -rw-r--r-- | src/soc/intel/braswell/iosf.c | 20 | ||||
| -rw-r--r-- | src/soc/intel/fsp_baytrail/iosf.c | 20 |
3 files changed, 12 insertions, 48 deletions
diff --git a/src/soc/intel/baytrail/iosf.c b/src/soc/intel/baytrail/iosf.c index 9e308bcc1e..bb5e80cb82 100644 --- a/src/soc/intel/baytrail/iosf.c +++ b/src/soc/intel/baytrail/iosf.c @@ -13,31 +13,19 @@ * GNU General Public License for more details. */ -#include <device/mmio.h> +#include <stdint.h> #include <device/pci_ops.h> #include <soc/iosf.h> -#if !defined(__PRE_RAM__) -#define IOSF_PCI_BASE (CONFIG_MMCONF_BASE_ADDRESS + (IOSF_PCI_DEV << 12)) - -static inline void write_iosf_reg(int reg, uint32_t value) -{ - write32((u32 *)(IOSF_PCI_BASE + reg), value); -} -static inline uint32_t read_iosf_reg(int reg) -{ - return read32((u32 *)(IOSF_PCI_BASE + reg)); -} -#else static inline void write_iosf_reg(int reg, uint32_t value) { - pci_write_config32(IOSF_PCI_DEV, reg, value); + pci_s_write_config32(IOSF_PCI_DEV, reg, value); } + static inline uint32_t read_iosf_reg(int reg) { - return pci_read_config32(IOSF_PCI_DEV, reg); + return pci_s_read_config32(IOSF_PCI_DEV, reg); } -#endif /* Common sequences for all the port accesses. */ static uint32_t iosf_read_port(uint32_t cr, int reg) diff --git a/src/soc/intel/braswell/iosf.c b/src/soc/intel/braswell/iosf.c index 7b5374a01e..5aa618164c 100644 --- a/src/soc/intel/braswell/iosf.c +++ b/src/soc/intel/braswell/iosf.c @@ -14,32 +14,20 @@ * GNU General Public License for more details. */ -#include <device/mmio.h> +#include <stdint.h> #include <device/pci_ops.h> #include <console/console.h> #include <soc/iosf.h> -#if ENV_RAMSTAGE -#define IOSF_PCI_BASE (CONFIG_MMCONF_BASE_ADDRESS + (IOSF_PCI_DEV << 12)) - static inline void write_iosf_reg(int reg, uint32_t value) { - write32((void *)(IOSF_PCI_BASE + reg), value); -} -static inline uint32_t read_iosf_reg(int reg) -{ - return read32((void *)(IOSF_PCI_BASE + reg)); -} -#else -static inline void write_iosf_reg(int reg, uint32_t value) -{ - pci_write_config32(IOSF_PCI_DEV, reg, value); + pci_s_write_config32(IOSF_PCI_DEV, reg, value); } + static inline uint32_t read_iosf_reg(int reg) { - return pci_read_config32(IOSF_PCI_DEV, reg); + return pci_s_read_config32(IOSF_PCI_DEV, reg); } -#endif /* ENV_RAMSTAGE */ /* Common sequences for all the port accesses. */ static uint32_t iosf_read_port(uint32_t cr, int reg) diff --git a/src/soc/intel/fsp_baytrail/iosf.c b/src/soc/intel/fsp_baytrail/iosf.c index 6308593c77..25f82ababd 100644 --- a/src/soc/intel/fsp_baytrail/iosf.c +++ b/src/soc/intel/fsp_baytrail/iosf.c @@ -15,31 +15,19 @@ * GNU General Public License for more details. */ -#include <device/mmio.h> +#include <stdint.h> #include <device/pci_ops.h> #include <soc/iosf.h> -#if !defined(__PRE_RAM__) -#define IOSF_PCI_BASE (CONFIG_MMCONF_BASE_ADDRESS + (IOSF_PCI_DEV << 12)) - -static inline void write_iosf_reg(int reg, uint32_t value) -{ - write32((u32 *)(IOSF_PCI_BASE + reg), value); -} -static inline uint32_t read_iosf_reg(int reg) -{ - return read32((u32 *)(IOSF_PCI_BASE + reg)); -} -#else static inline void write_iosf_reg(int reg, uint32_t value) { - pci_write_config32(IOSF_PCI_DEV, reg, value); + pci_s_write_config32(IOSF_PCI_DEV, reg, value); } + static inline uint32_t read_iosf_reg(int reg) { - return pci_read_config32(IOSF_PCI_DEV, reg); + return pci_s_read_config32(IOSF_PCI_DEV, reg); } -#endif /* Common sequences for all the port accesses. */ static uint32_t iosf_read_port(uint32_t cr, int reg) |