- Updates to config.g so that it works more reliably and has initial support

  for paths
- Renamed some configuration variables
  SMP -> CONFIG_SMP
  MAX_CPUS -> CONFIG_MAX_CPUS
  MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS
- Removed some dead configuration variables
MAX_CPUS -> CONFIG_MAX_CPUS
MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS
SMP -> CONFIG_SMP
FINAL_MAINBOARD_FIXUP
SIO_BASE
SIO_SYSTEM_CLK_INPUT
NO_KEYBOARD
USE_NORMAL_IMAGE
SERIAL_CONSOLE
USE_ELF_BOOT
ENABLE_FIXED_AND_VARIABLE_MTRRS
START_CPU_SEG
DISABLE_WATCHDOG
ENABLE_IOMMU
AMD8111_DEV

- Removed some assembly files that are no longer needed
killed src/southbridge/amd/amd8111/smbus.inc
killed src/southbrideg/amd/amd8111/cmos_boot_failover.inc
killed src/ram/ramtest.inc
- Updates to config.g so that it works more reliably and has initial support
  for paths
- Renamed some configuration variables
  SMP -> CONFIG_SMP
  MAX_CPUS -> CONFIG_MAX_CPUS
  MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS
- Removed some dead configuration variables
MAX_CPUS -> CONFIG_MAX_CPUS
MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS
SMP -> CONFIG_SMP
FINAL_MAINBOARD_FIXUP
SIO_BASE
SIO_SYSTEM_CLK_INPUT
NO_KEYBOARD
USE_NORMAL_IMAGE
SERIAL_CONSOLE
USE_ELF_BOOT
ENABLE_FIXED_AND_VARIABLE_MTRRS
START_CPU_SEG
DISABLE_WATCHDOG
ENABLE_IOMMU
AMD8111_DEV

- Removed some assembly files that are no longer needed
killed src/southbridge/amd/amd8111/smbus.inc
killed src/southbrideg/amd/amd8111/cmos_boot_failover.inc
killed src/ram/ramtest.inc
killed src/sdram/generic_dump_spd.inc
killed src/sdram/generic_dump_spd.inc

- Updated the arima/hdama to build with the new configuration system
- Updated config.g to list all of the variables with make echo


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 26 insertions, 116 deletions

diff --git a/targets/arima/hdama/Config.lb b/targets/arima/hdama/Config.lb
index 542802b8a7..f9941f5ceb 100644
--- a/targets/arima/hdama/Config.lb
+++ b/targets/arima/hdama/Config.lb
@@ -6,31 +6,29 @@ loadoptions
 
 target hdama
 
-uses AMD8111_DEV
 uses ARCH
 uses CONFIG_COMPRESS
 uses CONFIG_IOAPIC
 uses CONFIG_ROM_STREAM
 uses CONFIG_ROM_STREAM_START
-uses CONFIG_SMP
 uses CONFIG_UDELAY_TSC
 uses CPU_FIXUP
-uses ENABLE_FIXED_AND_VARIABLE_MTRRS
 uses FALLBACK_SIZE
-uses FINAL_MAINBOARD_FIXUP
 uses HAVE_FALLBACK_BOOT
 uses HAVE_MP_TABLE
 uses HAVE_PIRQ_TABLE
+uses HAVE_HARD_RESET
 uses i586
 uses i686
 uses INTEL_PPRO_MTRR
-uses IRQ_SLOT_COUNT
 uses HEAP_SIZE
+uses IRQ_SLOT_COUNT
 uses k7
 uses k8
 uses MAINBOARD_PART_NUMBER
 uses MAINBOARD_VENDOR
-uses MAX_CPUS
+uses CONFIG_SMP
+uses CONFIG_MAX_CPUS
 uses MEMORY_HOLE
 uses PAYLOAD_SIZE
 uses _RAMBASE
@@ -39,12 +37,8 @@ uses ROM_IMAGE_SIZE
 uses ROM_SECTION_OFFSET
 uses ROM_SECTION_SIZE
 uses ROM_SIZE
-uses SIO_BASE
-uses SIO_SYSTEM_CLK_INPUT
 uses STACK_SIZE
-uses USE_ELF_BOOT
 uses USE_FALLBACK_IMAGE
-uses USE_NORMAL_IMAGE
 uses USE_OPTION_TABLE
 uses HAVE_OPTION_TABLE
 uses MAXIMUM_CONSOLE_LOGLEVEL
@@ -52,15 +46,16 @@ uses  DEFAULT_CONSOLE_LOGLEVEL
 uses  CONFIG_CONSOLE_SERIAL8250
 uses MAINBOARD
 uses CONFIG_CHIP_CONFIGURE
+uses XIP_ROM_SIZE
+uses XIP_ROM_BASE
+uses LINUXBIOS_EXTRA_VERSION
 
 option CONFIG_CHIP_CONFIGURE=1
 
-option  MAXIMUM_CONSOLE_LOGLEVEL=7
-option  DEFAULT_CONSOLE_LOGLEVEL=7
+option  MAXIMUM_CONSOLE_LOGLEVEL=8
+option  DEFAULT_CONSOLE_LOGLEVEL=8
 option  CONFIG_CONSOLE_SERIAL8250=1
 
-option HAVE_OPTION_TABLE=1
-option HAVE_MP_TABLE=1
 option CPU_FIXUP=1
 option CONFIG_UDELAY_TSC=0
 option i686=1
@@ -68,95 +63,22 @@ option i586=1
 option INTEL_PPRO_MTRR=1
 option k7=1
 option k8=1
-option ROM_SIZE=0x100000
 
-### Customize our winbond superio chip for this motherboard
-###
-option SIO_BASE=0x2e
-option SIO_SYSTEM_CLK_INPUT=0
-#
-###
-### Build code to export a programmable irq routing table
-###
-option HAVE_PIRQ_TABLE=1
-option IRQ_SLOT_COUNT=18
-#
-###
-### Build code for SMP support
-### Only worry about 2 micro processors
-###
-option CONFIG_SMP=1
-option MAX_CPUS=2
-#
-###
-### Build code to setup a generic IOAPIC
-###
-option CONFIG_IOAPIC=1
-#
-###
-### MEMORY_HOLE instructs earlymtrr.inc to
-### enable caching from 0-640KB and to disable 
-### caching from 640KB-1MB using fixed MTRRs 
-###
-### Enabling this option breaks SMP because secondary
-### CPU identification depends on only variable MTRRs
-### being enabled.
-###
-option MEMORY_HOLE=0
-#
-###
-### Enable both fixed and variable MTRRS
-### When we setup MTRRs in mtrr.c  
-###
-### We must setup the fixed mtrrs or we confuse SMP secondary
-### processor identification
-###
-option ENABLE_FIXED_AND_VARIABLE_MTRRS=1
+option ROM_SIZE=524288
 
-###
-### Call the final_mainboard_fixup function
-###
-option FINAL_MAINBOARD_FIXUP=1
+
+option HAVE_OPTION_TABLE=1
+option CONFIG_ROM_STREAM=1
+option HAVE_FALLBACK_BOOT=1
 
 ###
 ### Compute the location and size of where this firmware image
 ### (linuxBIOS plus bootloader) will live in the boot rom chip.
 ###
-option FALLBACK_SIZE=0x100000
-###
-### Compute where this copy of linuxBIOS will start in the boot rom
-###
-#
-###
-### Compute a range of ROM that can cached to speed up linuxBIOS,
-### execution speed.
-###
-##expr XIP_ROM_SIZE = 65536
-##expr XIP_ROM_BASE = _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE
-##option XIP_ROM_SIZE=65536
-##option XIP_ROM_BASE=0xffff0000
-#
-## XIP_ROM_SIZE && XIP_ROM_BASE values that work.
-##option XIP_ROM_SIZE=0x8000
-##option XIP_ROM_BASE=0xffff8000
-
-## We don't use compressed image
-option CONFIG_COMPRESS=1
-
-option USE_ELF_BOOT=1
+option FALLBACK_SIZE=131072
 
 ## LinuxBIOS C code runs at this location in RAM
-option _RAMBASE=0x4000
-
-##
-## Use a 64K stack
-##
-option STACK_SIZE=0x10000
-
-##
-## Use a 64K heap
-##
-option HEAP_SIZE=0x10000
+option _RAMBASE=0x00004000
 
 #
 ###
@@ -166,32 +88,20 @@ option HEAP_SIZE=0x10000
 
 #
 # Arima hdama
-#romimage "normal"
-#	option USE_FALLBACK_IMAGE=0
-#	option ROM_SECTION_SIZE  = (ROM_SIZE - FALLBACK_SIZE)
-#	option ROM_SECTION_OFFSET= 0
-#	option PAYLOAD_SIZE            = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
-#	option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
-#	option CONFIG_ROM_STREAM     = 1
-#	option _ROMBASE      = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE)
-#	mainboard arima/hdama
-#	payload ../eepro100.ebi 
-#end
+romimage "normal"
+	option USE_FALLBACK_IMAGE=0
+	option ROM_IMAGE_SIZE=0x10000
+	option LINUXBIOS_EXTRA_VERSION=".0Normal"
+	mainboard arima/hdama
+	payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
+end
 
 romimage "fallback" 
-	option ROM_IMAGE_SIZE=0x10000
-#	option ROM_IMAGE_SIZE=120*1024
 	option USE_FALLBACK_IMAGE=1
-	option HAVE_FALLBACK_BOOT=1
-	option ROM_SECTION_SIZE  = FALLBACK_SIZE
-	option ROM_SECTION_OFFSET= (ROM_SIZE - FALLBACK_SIZE)
-	option PAYLOAD_SIZE            = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
-	option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
-	option CONFIG_ROM_STREAM     = 1
-	option _ROMBASE      = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE)
+	option ROM_IMAGE_SIZE=0x10000
+	option LINUXBIOS_EXTRA_VERSION=".0Fallback"
 	mainboard arima/hdama
-	payload ../../../../tg3--ide_disk.zelf
-#	payload ../../../../opteron_phase1_p4_noapic
+	payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
 end
 
 buildrom ROM_SIZE "normal" "fallback"