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authorRon Minnich <Ron Minnich>2006-07-28 16:06:16 +0000
committerRonald G. Minnich <rminnich@gmail.com>2006-07-28 16:06:16 +0000
commit5e9dc231209c1a293b5a92a9ea78eb07ce0a3086 (patch)
tree00c90e50087fba91bf5fb2cab050b3191b1daf46 /targets/artecgroup/dbe61
parente534daa05ae7057ad615e15fa3021b19f4850fd0 (diff)
downloadcoreboot-5e9dc231209c1a293b5a92a9ea78eb07ce0a3086.tar.xz
This patch adds support for the AMD LX cpu.
There is one global change to pci_ids.h. The rest are changes for LX. I ran abuild and it is ok. Not all artec design changes are included as some of them would adversely affect other mainboards. Indrek will need to test. Signed-off-by: Ron Minnich Signed-off-by: Indrek Kruusa, indrek.kruusa@artecdesign.ee, artec design. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2350 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets/artecgroup/dbe61')
-rw-r--r--targets/artecgroup/dbe61/Config.lb20
1 files changed, 20 insertions, 0 deletions
diff --git a/targets/artecgroup/dbe61/Config.lb b/targets/artecgroup/dbe61/Config.lb
new file mode 100644
index 0000000000..bc56000ec8
--- /dev/null
+++ b/targets/artecgroup/dbe61/Config.lb
@@ -0,0 +1,20 @@
+# Config file for the olpc rev_a
+
+target dbe61
+mainboard artecgroup/dbe61
+
+# leave 128k for vsa
+option CONFIG_COMPRESSED_ROM_STREAM=0
+option ROM_SIZE=1024*256-128*1024
+option FALLBACK_SIZE=ROM_SIZE
+
+option DEFAULT_CONSOLE_LOGLEVEL = 11
+option MAXIMUM_CONSOLE_LOGLEVEL = 11
+romimage "fallback"
+ option USE_FALLBACK_IMAGE=1
+ option ROM_IMAGE_SIZE=32*1024
+ option LINUXBIOS_EXTRA_VERSION=".0Fallback"
+ payload /tmp/rtl8139--filo.zelf
+end
+
+buildrom ./linuxbios.rom ROM_SIZE "fallback"