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authorYinghai Lu <yinghailu@gmail.com>2004-04-28 05:37:36 +0000
committerYinghai Lu <yinghailu@gmail.com>2004-04-28 05:37:36 +0000
commit97c4947ec9af1664e81ee797834a32d3ca2f74fe (patch)
tree33f41aaaf4c61c0b41ae4751081d2c369ee371b0 /targets/tyan/s2880
parent48d11d557f725ecf89678a1b9df440417b8da225 (diff)
downloadcoreboot-97c4947ec9af1664e81ee797834a32d3ca2f74fe.tar.xz
Changes for btext and etherboot and filo merge support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1540 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets/tyan/s2880')
-rw-r--r--targets/tyan/s2880/Config.lb22
1 files changed, 17 insertions, 5 deletions
diff --git a/targets/tyan/s2880/Config.lb b/targets/tyan/s2880/Config.lb
index b0de50850a..df1a518976 100644
--- a/targets/tyan/s2880/Config.lb
+++ b/targets/tyan/s2880/Config.lb
@@ -42,6 +42,7 @@ uses USE_OPTION_TABLE
uses HAVE_OPTION_TABLE
uses CONFIG_CHIP_CONFIGURE
+uses CONFIG_CONSOLE_BTEXT
uses CONFIG_CONSOLE_SERIAL8250
uses TTYS0_BAUD
uses DEFAULT_CONSOLE_LOGLEVEL
@@ -79,6 +80,7 @@ option k7=1
option k8=1
option ROM_SIZE=524288
+option CONFIG_CONSOLE_BTEXT=1
#option CONFIG_VGABIOS=0
#option CONFIG_REALMODE_IDT=0
#option CONFIG_PCIBIOS=0
@@ -170,9 +172,9 @@ option TTYS0_BAUD=115200
## SPEW 9 Way too many details
## Request this level of debugging output
-option DEFAULT_CONSOLE_LOGLEVEL=8
+option DEFAULT_CONSOLE_LOGLEVEL=7
## At a maximum only compile in this level of debugging
-option MAXIMUM_CONSOLE_LOGLEVEL=8
+option MAXIMUM_CONSOLE_LOGLEVEL=7
option DEBUG=1
@@ -202,7 +204,7 @@ option CONFIG_ROM_STREAM = 1
#
romimage "normal"
# 48K for SCSI FW
- option ROM_SIZE = 475136
+# option ROM_SIZE = 475136
# 48K for SCSI FW and 48K for ATI ROM
# option ROM_SIZE = 425984
option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal"
@@ -220,7 +222,12 @@ romimage "normal"
option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
mainboard tyan/s2880
- payload ../../tg3--ide_disk.zelf
+# payload ../../../payloads/tg3--ide_disk.zelf
+# payload ../../../payloads/filo.elf
+# payload ../../../payloads/filo_mem.elf
+# payload ../../../payloads/filo_mem_btext.elf
+# payload ../../../payloads/filo_btext.zelf
+ payload ../../../payloads/tg3--filo_btext.zelf
end
romimage "fallback"
@@ -238,7 +245,12 @@ romimage "fallback"
option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
mainboard tyan/s2880
- payload ../../tg3--ide_disk.zelf
+# payload ../../../payloads/tg3--ide_disk.zelf
+# payload ../../../payloads/filo.elf
+# payload ../../../payloads/filo_mem.elf
+# payload ../../../payloads/filo_mem_btext.elf
+# payload ../../../payloads/filo_btext.zelf
+ payload ../../../payloads/tg3--filo_btext.zelf
end
buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"