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authorPatrick Georgi <patrick.georgi@coresystems.de>2009-06-06 07:19:53 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-06-06 07:19:53 +0000
commit240ef7c7691a29e96f7710b2f6d6d95b5bb53d13 (patch)
tree5e989b0857c249c62863b4618474226e48526515 /targets/via/vt8454c
parentaa58f5427ff5188bc867b1016ca2a41e0a516519 (diff)
downloadcoreboot-240ef7c7691a29e96f7710b2f6d6d95b5bb53d13.tar.xz
Change the CBFS build process to use coreboot.rom
instead of coreboot.strip. That fixes the normal image because the calculations for its offset in the ROM match reality again. This requires changes in CBFS configurations to minimize the bootblock size. These are also done for CBFS boards. Other than this a couple of minor fixes are in this patch: - make asus/m2v-mx_se build with abuild with a crosscompiler - move CONFIG_CBFS for hp/dl145_g3 to Options.lb as it's done everywhere else - change the default config of abuild to not provide ROM_IMAGE_SIZE values for the images in a CBFS configuration - change abuild's crosscompile autodetection to not try to use "i386-elf-i386-elf-gcc" (which is bogus) Except for the latter two abuild changes (both in util/abuild/abuild), they're available as patch set on the mailing list in a mail from 2009-06-05 titled [PATCH]es to get normal image to work again with CBFS The changes in util/abuild/abuild are trivial and abuild tested. As discussed on the list, targets/hp/dl145_g3/Config-abuild.lb is deleted, now that Config.lb works again. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets/via/vt8454c')
-rw-r--r--targets/via/vt8454c/Config-abuild.lb2
-rw-r--r--targets/via/vt8454c/Config.lb2
2 files changed, 0 insertions, 4 deletions
diff --git a/targets/via/vt8454c/Config-abuild.lb b/targets/via/vt8454c/Config-abuild.lb
index d208e7479d..a6c5ef1553 100644
--- a/targets/via/vt8454c/Config-abuild.lb
+++ b/targets/via/vt8454c/Config-abuild.lb
@@ -29,14 +29,12 @@ option CROSS_COMPILE="CROSS_PREFIX"
option HOSTCC="CROSS_HOSTCC"
option ROM_SIZE=512*1024
-option FALLBACK_SIZE=512*1024
__COMPRESSION__
__LOGLEVEL__
romimage "fallback"
option USE_FALLBACK_IMAGE=1
- option ROM_IMAGE_SIZE=0x15000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload __PAYLOAD__
end
diff --git a/targets/via/vt8454c/Config.lb b/targets/via/vt8454c/Config.lb
index a75c1e3b0a..b98352b8d3 100644
--- a/targets/via/vt8454c/Config.lb
+++ b/targets/via/vt8454c/Config.lb
@@ -30,14 +30,12 @@ option ROM_SIZE=(512-64)*1024
romimage "normal"
option USE_FALLBACK_IMAGE=0
- option ROM_IMAGE_SIZE=0x14000
option COREBOOT_EXTRA_VERSION=".0-normal"
payload $(HOME)/payload.elf
end
romimage "fallback"
option USE_FALLBACK_IMAGE=1
- option ROM_IMAGE_SIZE=0x14000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload $(HOME)/payload.elf
end