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authorRonald G. Minnich <rminnich@gmail.com>2003-09-26 16:12:23 +0000
committerRonald G. Minnich <rminnich@gmail.com>2003-09-26 16:12:23 +0000
commit430111b9d1472ef72d9960020eb3eb28e276ca7e (patch)
tree2c2f73a131983260260fb6abb4172378cfa3afbb /targets/via
parentaa4b4e031f9f48840aca3c4961d3edf59701eea7 (diff)
downloadcoreboot-430111b9d1472ef72d9960020eb3eb28e276ca7e.tar.xz
It builds!
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets/via')
-rw-r--r--targets/via/epia/Config.lb6
1 files changed, 2 insertions, 4 deletions
diff --git a/targets/via/epia/Config.lb b/targets/via/epia/Config.lb
index da433f4486..d92f0c61ff 100644
--- a/targets/via/epia/Config.lb
+++ b/targets/via/epia/Config.lb
@@ -9,6 +9,7 @@ target epia
uses ARCH
uses CONFIG_COMPRESS
uses CONFIG_IOAPIC
+uses CONFIG_KEYBOARD
uses CONFIG_ROM_STREAM
uses CONFIG_ROM_STREAM_START
uses CONFIG_UDELAY_TSC
@@ -23,8 +24,6 @@ uses i686
uses INTEL_PPRO_MTRR
uses HEAP_SIZE
uses IRQ_SLOT_COUNT
-uses k7
-uses k8
uses MAINBOARD_PART_NUMBER
uses MAINBOARD_VENDOR
uses CONFIG_SMP
@@ -51,6 +50,7 @@ uses XIP_ROM_BASE
uses LINUXBIOS_EXTRA_VERSION
option CONFIG_CHIP_CONFIGURE=1
+option CONFIG_KEYBOARD=1
option MAXIMUM_CONSOLE_LOGLEVEL=8
option DEFAULT_CONSOLE_LOGLEVEL=8
@@ -61,8 +61,6 @@ option CONFIG_UDELAY_TSC=0
option i686=1
option i586=1
option INTEL_PPRO_MTRR=1
-option k7=1
-option k8=1
option ROM_SIZE=524288