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authorRonald G. Minnich <rminnich@gmail.com>2004-09-30 16:37:22 +0000
committerRonald G. Minnich <rminnich@gmail.com>2004-09-30 16:37:22 +0000
commita4779e80c3e54e6e6c31169908803065b4ef68b2 (patch)
tree80dc6721ec07d14523e6ed3ee1af30013f869a6b /targets
parent2b763af4ca6541734ff7d36a16173f9606c248c9 (diff)
downloadcoreboot-a4779e80c3e54e6e6c31169908803065b4ef68b2.tar.xz
digital logic stuff, fixes for the smbus code in 82801dbm
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1652 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets')
-rw-r--r--targets/digitallogic/adl855pc/Config.lb6
1 files changed, 3 insertions, 3 deletions
diff --git a/targets/digitallogic/adl855pc/Config.lb b/targets/digitallogic/adl855pc/Config.lb
index 09bdbb7ca4..58d1bcf8f2 100644
--- a/targets/digitallogic/adl855pc/Config.lb
+++ b/targets/digitallogic/adl855pc/Config.lb
@@ -52,8 +52,8 @@ option TTYS0_BAUD=115200
option CONFIG_CHIP_CONFIGURE=1
-option MAXIMUM_CONSOLE_LOGLEVEL=7
-option DEFAULT_CONSOLE_LOGLEVEL=7
+option MAXIMUM_CONSOLE_LOGLEVEL=9
+option DEFAULT_CONSOLE_LOGLEVEL=9
option CONFIG_CONSOLE_SERIAL8250=1
option CPU_FIXUP=1
@@ -61,7 +61,7 @@ option CONFIG_UDELAY_TSC=0
option i686=1
option i586=1
option INTEL_PPRO_MTRR=1
-option ROM_SIZE=256*1024
+option ROM_SIZE=1024*1024
option HAVE_OPTION_TABLE=1
option CONFIG_ROM_STREAM=1