diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2009-06-30 15:17:49 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2009-06-30 15:17:49 +0000 |
| commit | 0867062412dd4bfe5a556e5f3fd85ba5b682d79b (patch) | |
| tree | 81ca5db12b8567b48daaa23a541bfb8a5dc011f8 /targets | |
| parent | 9702b6bf7ec5a4fb16934f1cf2724480e2460c89 (diff) | |
| download | coreboot-0867062412dd4bfe5a556e5f3fd85ba5b682d79b.tar.xz | |
This patch unifies the use of config options in v2 to all start with CONFIG_
It's basically done with the following script and some manual fixup:
VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets')
176 files changed, 1951 insertions, 1951 deletions
diff --git a/targets/a-trend/atc-6220/Config.lb b/targets/a-trend/atc-6220/Config.lb index 609110ffd9..4d8ebc0e3e 100644 --- a/targets/a-trend/atc-6220/Config.lb +++ b/targets/a-trend/atc-6220/Config.lb @@ -21,29 +21,29 @@ target atc-6220 mainboard a-trend/atc-6220 -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "A-Trend" -option MAINBOARD_PART_NUMBER = "ATC-6220" +option CONFIG_MAINBOARD_VENDOR = "A-Trend" +option CONFIG_MAINBOARD_PART_NUMBER = "ATC-6220" -option IRQ_SLOT_COUNT = 7 +option CONFIG_IRQ_SLOT_COUNT = 7 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/a-trend/atc-6240/Config.lb b/targets/a-trend/atc-6240/Config.lb index bbd57e09a8..16a0c263b2 100644 --- a/targets/a-trend/atc-6240/Config.lb +++ b/targets/a-trend/atc-6240/Config.lb @@ -21,29 +21,29 @@ target atc-6240 mainboard a-trend/atc-6240 -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "A-Trend" -option MAINBOARD_PART_NUMBER = "ATC-6240" +option CONFIG_MAINBOARD_VENDOR = "A-Trend" +option CONFIG_MAINBOARD_PART_NUMBER = "ATC-6240" -option IRQ_SLOT_COUNT = 7 +option CONFIG_IRQ_SLOT_COUNT = 7 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload ../payload.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/abit/be6-ii_v2_0/Config.lb b/targets/abit/be6-ii_v2_0/Config.lb index 2a4bc79c17..cfeeca0610 100644 --- a/targets/abit/be6-ii_v2_0/Config.lb +++ b/targets/abit/be6-ii_v2_0/Config.lb @@ -21,29 +21,29 @@ target be6-ii_v2_0 mainboard abit/be6-ii_v2_0 -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "Abit" -option MAINBOARD_PART_NUMBER = "BE6-II V2.0" +option CONFIG_MAINBOARD_VENDOR = "Abit" +option CONFIG_MAINBOARD_PART_NUMBER = "BE6-II V2.0" -option IRQ_SLOT_COUNT = 9 +option CONFIG_IRQ_SLOT_COUNT = 9 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/advantech/pcm-5820/Config.lb b/targets/advantech/pcm-5820/Config.lb index fe26b2b645..8be840d6f1 100644 --- a/targets/advantech/pcm-5820/Config.lb +++ b/targets/advantech/pcm-5820/Config.lb @@ -21,12 +21,12 @@ target pcm-5820 mainboard advantech/pcm-5820 -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "Advantech" -option MAINBOARD_PART_NUMBER = "PCM-5820" +option CONFIG_MAINBOARD_VENDOR = "Advantech" +option CONFIG_MAINBOARD_PART_NUMBER = "PCM-5820" -option IRQ_SLOT_COUNT = 2 +option CONFIG_IRQ_SLOT_COUNT = 2 ## Enable VGA with a splash screen (only 640x480 to run on most monitors). ## We want to support up to 1024x768@16 so we need 2MiB video memory. @@ -36,19 +36,19 @@ option CONFIG_GX1_VIDEOMODE = 0 option CONFIG_SPLASH_GRAPHIC = 1 option CONFIG_VIDEO_MB = 2 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/amd/db800/Config.lb b/targets/amd/db800/Config.lb index f1455a0fad..a9230f01bd 100644 --- a/targets/amd/db800/Config.lb +++ b/targets/amd/db800/Config.lb @@ -30,20 +30,20 @@ option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0 option CONFIG_COMPRESSED_PAYLOAD_LZMA=0 # Leave 36k for VSA. -option ROM_SIZE=512*1024-36*1024 -# option ROM_SIZE=256*1024-36*1024 -option FALLBACK_SIZE=ROM_SIZE +option CONFIG_ROM_SIZE=512*1024-36*1024 +# option CONFIG_ROM_SIZE=256*1024-36*1024 +option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 -# option DEFAULT_CONSOLE_LOGLEVEL = 4 -# option MAXIMUM_CONSOLE_LOGLEVEL = 4 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 +# option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 4 +# option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 4 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=64*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION=".0Fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/amd/dbm690t/Config-abuild.lb b/targets/amd/dbm690t/Config-abuild.lb index ec05545ff7..e299413a2d 100644 --- a/targets/amd/dbm690t/Config-abuild.lb +++ b/targets/amd/dbm690t/Config-abuild.lb @@ -4,27 +4,27 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=1024*1024 +option CONFIG_ROM_SIZE=1024*1024 romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "failover" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-failover" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "normal" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "failover" diff --git a/targets/amd/dbm690t/Config.lb b/targets/amd/dbm690t/Config.lb index c0c3f22595..80c9db639d 100644 --- a/targets/amd/dbm690t/Config.lb +++ b/targets/amd/dbm690t/Config.lb @@ -4,18 +4,18 @@ target dbm690t mainboard amd/dbm690t romimage "normal" - option ROM_SIZE = 1024*1024 - 55808 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_ROM_SIZE = 1024*1024 - 55808 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 payload ../payload.elf end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/amd/norwich/Config.lb b/targets/amd/norwich/Config.lb index 4f4100af3f..5f927c567a 100644 --- a/targets/amd/norwich/Config.lb +++ b/targets/amd/norwich/Config.lb @@ -30,20 +30,20 @@ option CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1 option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0 option CONFIG_COMPRESSED_PAYLOAD_LZMA=0 -option ROM_SIZE=512*1024-36*1024 -#option ROM_SIZE=256*1024-36*1024 -option FALLBACK_SIZE=ROM_SIZE +option CONFIG_ROM_SIZE=512*1024-36*1024 +#option CONFIG_ROM_SIZE=256*1024-36*1024 +option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 -#option DEFAULT_CONSOLE_LOGLEVEL = 4 -#option MAXIMUM_CONSOLE_LOGLEVEL = 4 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 +#option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 4 +#option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 4 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=64*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION=".0Fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/amd/pistachio/Config-abuild.lb b/targets/amd/pistachio/Config-abuild.lb index ec05545ff7..e299413a2d 100644 --- a/targets/amd/pistachio/Config-abuild.lb +++ b/targets/amd/pistachio/Config-abuild.lb @@ -4,27 +4,27 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=1024*1024 +option CONFIG_ROM_SIZE=1024*1024 romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "failover" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-failover" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "normal" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "failover" diff --git a/targets/amd/pistachio/Config.lb b/targets/amd/pistachio/Config.lb index af8e1afa40..e2e7939ac7 100644 --- a/targets/amd/pistachio/Config.lb +++ b/targets/amd/pistachio/Config.lb @@ -4,18 +4,18 @@ target pistachio mainboard amd/pistachio romimage "normal" - option ROM_SIZE = 1024*1024 - 55808 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_ROM_SIZE = 1024*1024 - 55808 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 payload ../payload.elf end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/amd/rumba/Config.lb b/targets/amd/rumba/Config.lb index ee30902b8b..ac42dd41e9 100644 --- a/targets/amd/rumba/Config.lb +++ b/targets/amd/rumba/Config.lb @@ -4,11 +4,11 @@ target rumba mainboard amd/rumba -option ROM_SIZE=256*1024 +option CONFIG_ROM_SIZE=256*1024 romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -19,8 +19,8 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -30,4 +30,4 @@ romimage "fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/amd/rumba/Config.nofallback.lb b/targets/amd/rumba/Config.nofallback.lb index 448df55652..d3c5464882 100644 --- a/targets/amd/rumba/Config.nofallback.lb +++ b/targets/amd/rumba/Config.nofallback.lb @@ -4,13 +4,13 @@ target rumba mainboard amd/rumba -option ROM_SIZE=128*1024 -option FALLBACK_SIZE=ROM_SIZE -#option FALLBACK_SIZE=65535 +option CONFIG_ROM_SIZE=128*1024 +option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE +#option CONFIG_FALLBACK_SIZE=65535 #romimage "normal" -# option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x10000 +# option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x10000 # option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -21,8 +21,8 @@ option FALLBACK_SIZE=ROM_SIZE #end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -33,6 +33,6 @@ romimage "fallback" # payload /home/ollie/work/filo-0.4.1/filo.elf end -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" -buildrom ./coreboot.rom ROM_SIZE "fallback" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/amd/serengeti_cheetah/Config-abuild.lb b/targets/amd/serengeti_cheetah/Config-abuild.lb index 88dd1684e3..b1c927705b 100644 --- a/targets/amd/serengeti_cheetah/Config-abuild.lb +++ b/targets/amd/serengeti_cheetah/Config-abuild.lb @@ -4,33 +4,33 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/amd/serengeti_cheetah/Config-lab.lb b/targets/amd/serengeti_cheetah/Config-lab.lb index 42cefc190e..bcb443bcac 100644 --- a/targets/amd/serengeti_cheetah/Config-lab.lb +++ b/targets/amd/serengeti_cheetah/Config-lab.lb @@ -5,20 +5,20 @@ target serengeti_cheetah mainboard amd/serengeti_cheetah -option ROM_SIZE = 0x100000 -option USE_FAILOVER_IMAGE=0 -option HAVE_FAILOVER_BOOT=0 -option FAILOVER_SIZE=0 +option CONFIG_ROM_SIZE = 0x100000 +option CONFIG_USE_FAILOVER_IMAGE=0 +option CONFIG_HAVE_FAILOVER_BOOT=0 +option CONFIG_FAILOVER_SIZE=0 romimage "fallback" option CONFIG_PRECOMPRESSED_PAYLOAD=1 option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 - option FALLBACK_SIZE=ROM_SIZE - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x1a000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x1a000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" payload ../payload.elf.lzma end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/amd/serengeti_cheetah/Config.lb b/targets/amd/serengeti_cheetah/Config.lb index a23505f6d3..ce180ea3d9 100644 --- a/targets/amd/serengeti_cheetah/Config.lb +++ b/targets/amd/serengeti_cheetah/Config.lb @@ -8,18 +8,18 @@ mainboard amd/serengeti_cheetah # serengeti_leopard romimage "normal" # 48K for SCSI FW -# option ROM_SIZE = 475136 +# option CONFIG_ROM_SIZE = 475136 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 425984 +# option CONFIG_ROM_SIZE = 425984 # 64K for Etherboot -# option ROM_SIZE = 458752 - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x18800 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 +# option CONFIG_ROM_SIZE = 458752 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x18800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -42,13 +42,13 @@ romimage "normal" end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x19800 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x19800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -75,13 +75,13 @@ romimage "fallback" end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/amd/serengeti_cheetah_fam10/Config-abuild.lb b/targets/amd/serengeti_cheetah_fam10/Config-abuild.lb index 996a1b50c3..6892a0eaa2 100644 --- a/targets/amd/serengeti_cheetah_fam10/Config-abuild.lb +++ b/targets/amd/serengeti_cheetah_fam10/Config-abuild.lb @@ -4,27 +4,27 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=1024*1024 +option CONFIG_ROM_SIZE=1024*1024 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x3f000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x3f000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION=".0-failover" end -buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" "failover" diff --git a/targets/amd/serengeti_cheetah_fam10/Config-lab.lb b/targets/amd/serengeti_cheetah_fam10/Config-lab.lb index 61e1b3c762..7cc594cd7d 100644 --- a/targets/amd/serengeti_cheetah_fam10/Config-lab.lb +++ b/targets/amd/serengeti_cheetah_fam10/Config-lab.lb @@ -25,30 +25,30 @@ target serengeti_cheetah_fam10 mainboard amd/serengeti_cheetah_fam10 # Request this level of debugging output - option DEFAULT_CONSOLE_LOGLEVEL=9 + option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=9 # At a maximum only compile in this level of debugging - option MAXIMUM_CONSOLE_LOGLEVEL=9 + option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9 # 1024KB ROM -option ROM_SIZE=1024*1024 -option FALLBACK_SIZE=ROM_SIZE-FAILOVER_SIZE +option CONFIG_ROM_SIZE=1024*1024 +option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE-CONFIG_FAILOVER_SIZE romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x30000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x30000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" payload ../payload.elf.lzma end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" "failover" diff --git a/targets/amd/serengeti_cheetah_fam10/Config.lb b/targets/amd/serengeti_cheetah_fam10/Config.lb index cad35150b6..189d536277 100644 --- a/targets/amd/serengeti_cheetah_fam10/Config.lb +++ b/targets/amd/serengeti_cheetah_fam10/Config.lb @@ -25,46 +25,46 @@ target serengeti_cheetah_fam10 mainboard amd/serengeti_cheetah_fam10 # Request this level of debugging output - option DEFAULT_CONSOLE_LOGLEVEL=9 + option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=9 # At a maximum only compile in this level of debugging - option MAXIMUM_CONSOLE_LOGLEVEL=9 + option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9 # 512KB ROM -option ROM_SIZE=1024*1024 +option CONFIG_ROM_SIZE=1024*1024 # Cheetah Family 10 #romimage "normal" # 1MB ROM -# option ROM_SIZE = 0x100000 -# option USE_FAILOVER_IMAGE=0 -# option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x30000 -# option XIP_ROM_SIZE=0x40000 +# option CONFIG_ROM_SIZE = 0x100000 +# option CONFIG_USE_FAILOVER_IMAGE=0 +# option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x30000 +# option CONFIG_XIP_ROM_SIZE=0x40000 # option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../payload.elf #end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x19800 - option ROM_IMAGE_SIZE=0x7f000 -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x80000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x19800 + option CONFIG_ROM_IMAGE_SIZE=0x7f000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x80000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" payload ../payload.elf end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" -buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" "failover" diff --git a/targets/arima/hdama/Config-abuild.lb b/targets/arima/hdama/Config-abuild.lb index 44cec1431d..03331da64c 100644 --- a/targets/arima/hdama/Config-abuild.lb +++ b/targets/arima/hdama/Config-abuild.lb @@ -4,25 +4,25 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/arima/hdama/Config.kernelimage.lb b/targets/arima/hdama/Config.kernelimage.lb index 7bfaa5c477..bf5c59850c 100644 --- a/targets/arima/hdama/Config.kernelimage.lb +++ b/targets/arima/hdama/Config.kernelimage.lb @@ -6,79 +6,79 @@ loadoptions target hdama -uses ARCH +uses CONFIG_ARCH uses CONFIG_COMPRESS uses CONFIG_IOAPIC uses CONFIG_ROM_PAYLOAD uses CONFIG_ROM_PAYLOAD_START uses CONFIG_UDELAY_TSC uses CPU_FIXUP -uses FALLBACK_SIZE -uses HAVE_FALLBACK_BOOT -uses HAVE_MP_TABLE -uses HAVE_PIRQ_TABLE -uses HAVE_HARD_RESET +uses CONFIG_FALLBACK_SIZE +uses CONFIG_HAVE_FALLBACK_BOOT +uses CONFIG_HAVE_MP_TABLE +uses CONFIG_HAVE_PIRQ_TABLE +uses CONFIG_HAVE_HARD_RESET uses i586 uses i686 -uses INTEL_PPRO_MTRR -uses HEAP_SIZE -uses IRQ_SLOT_COUNT +uses CONFIG_INTEL_PPRO_MTRR +uses CONFIG_HEAP_SIZE +uses CONFIG_IRQ_SLOT_COUNT uses k7 uses k8 -uses MAINBOARD_PART_NUMBER -uses MAINBOARD_VENDOR +uses CONFIG_MAINBOARD_PART_NUMBER +uses CONFIG_MAINBOARD_VENDOR uses CONFIG_SMP uses CONFIG_MAX_CPUS -uses MEMORY_HOLE -uses PAYLOAD_SIZE -uses _RAMBASE -uses _ROMBASE -uses ROM_IMAGE_SIZE -uses ROM_SECTION_OFFSET -uses ROM_SECTION_SIZE -uses ROM_SIZE -uses STACK_SIZE -uses USE_FALLBACK_IMAGE -uses USE_OPTION_TABLE -uses HAVE_OPTION_TABLE -uses MAXIMUM_CONSOLE_LOGLEVEL -uses DEFAULT_CONSOLE_LOGLEVEL +uses CONFIG_MEMORY_HOLE +uses CONFIG_PAYLOAD_SIZE +uses CONFIG_RAMBASE +uses CONFIG_ROMBASE +uses CONFIG_ROM_IMAGE_SIZE +uses CONFIG_ROM_SECTION_OFFSET +uses CONFIG_ROM_SECTION_SIZE +uses CONFIG_ROM_SIZE +uses CONFIG_STACK_SIZE +uses CONFIG_USE_FALLBACK_IMAGE +uses CONFIG_USE_OPTION_TABLE +uses CONFIG_HAVE_OPTION_TABLE +uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL +uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_CONSOLE_SERIAL8250 -uses MAINBOARD +uses CONFIG_MAINBOARD uses CONFIG_CHIP_CONFIGURE -uses XIP_ROM_SIZE -uses XIP_ROM_BASE +uses CONFIG_XIP_ROM_SIZE +uses CONFIG_XIP_ROM_BASE uses COREBOOT_EXTRA_VERSION option CONFIG_CHIP_CONFIGURE=1 -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 option CPU_FIXUP=1 option CONFIG_UDELAY_TSC=0 option i686=1 option i586=1 -option INTEL_PPRO_MTRR=1 +option CONFIG_INTEL_PPRO_MTRR=1 option k7=1 option k8=1 -option ROM_SIZE=1024*1024 +option CONFIG_ROM_SIZE=1024*1024 -option HAVE_OPTION_TABLE=1 +option CONFIG_HAVE_OPTION_TABLE=1 option CONFIG_ROM_PAYLOAD=1 -option HAVE_FALLBACK_BOOT=1 +option CONFIG_HAVE_FALLBACK_BOOT=1 ### ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -option FALLBACK_SIZE=ROM_SIZE +option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE ## Coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 # ### @@ -89,9 +89,9 @@ option _RAMBASE=0x00004000 # # Arima hdama romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 -# option ROM_SECTION_SIZE=0x100000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 +# option CONFIG_ROM_SECTION_SIZE=0x100000 option COREBOOT_EXTRA_VERSION=".0Fallback" mainboard arima/hdama # payload ../../../../tg3--ide_disk.zelf @@ -100,4 +100,4 @@ romimage "fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/arima/hdama/Config.lb b/targets/arima/hdama/Config.lb index 038e38d63c..38d6df0704 100644 --- a/targets/arima/hdama/Config.lb +++ b/targets/arima/hdama/Config.lb @@ -6,23 +6,23 @@ target hdama mainboard arima/hdama -option ROM_SIZE=512*1024-36*1024 +option CONFIG_ROM_SIZE=512*1024-36*1024 # Arima hdama romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0Normal" payload ../../../payloads/filo.elf # payload /etc/hosts end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0Fallback" payload ../../../payloads/filo.elf # payload /etc/hosts end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/artecgroup/dbe61/Config.lb b/targets/artecgroup/dbe61/Config.lb index 9a5ec8acb9..0cd1ee5710 100644 --- a/targets/artecgroup/dbe61/Config.lb +++ b/targets/artecgroup/dbe61/Config.lb @@ -9,26 +9,26 @@ option CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1 option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0 option CONFIG_COMPRESSED_PAYLOAD_LZMA=0 -## ROM_SIZE is the total number of bytes allocated for coreboot use +## CONFIG_ROM_SIZE is the total number of bytes allocated for coreboot use ## (normal AND fallback images and payloads). ## leave 36k for vsa and 32K for video ROM -#option ROM_SIZE = 1024*256 - 36*1024 - 32 * 1024 +#option CONFIG_ROM_SIZE = 1024*256 - 36*1024 - 32 * 1024 #No VGA for now -option ROM_SIZE = 1024*512 - 36*1024 +option CONFIG_ROM_SIZE = 1024*512 - 36*1024 -# ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, +# CONFIG_ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, ## not including any payload. -option ROM_IMAGE_SIZE=64*1024 +option CONFIG_ROM_IMAGE_SIZE=64*1024 -option FALLBACK_SIZE = ROM_SIZE +option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 option COREBOOT_EXTRA_VERSION=".0Fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/asi/mb_5blgp/Config.lb b/targets/asi/mb_5blgp/Config.lb index 12371c9a42..db75ec55de 100644 --- a/targets/asi/mb_5blgp/Config.lb +++ b/targets/asi/mb_5blgp/Config.lb @@ -21,12 +21,12 @@ target mb_5blgp mainboard asi/mb_5blgp -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "ASI" -option MAINBOARD_PART_NUMBER = "MB-5BLGP" +option CONFIG_MAINBOARD_VENDOR = "ASI" +option CONFIG_MAINBOARD_PART_NUMBER = "MB-5BLGP" -option IRQ_SLOT_COUNT = 3 +option CONFIG_IRQ_SLOT_COUNT = 3 ## Enable VGA with a splash screen (only 640x480 to run on most monitors). ## We want to support up to 1024x768@16 so we need 2MiB video memory. @@ -36,19 +36,19 @@ option CONFIG_GX1_VIDEOMODE = 0 option CONFIG_SPLASH_GRAPHIC = 1 option CONFIG_VIDEO_MB = 2 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload ../payload.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/asi/mb_5blmp/Config.lb b/targets/asi/mb_5blmp/Config.lb index 94462503a8..3dfe28a6f7 100644 --- a/targets/asi/mb_5blmp/Config.lb +++ b/targets/asi/mb_5blmp/Config.lb @@ -21,23 +21,23 @@ target mb_5blmp mainboard asi/mb_5blmp -option ROM_SIZE = (256 * 1024) -# option ROM_SIZE = (256 * 1024) - (32 * 1024) -# option FALLBACK_SIZE = (256 * 1024) - (32 * 1024) +option CONFIG_ROM_SIZE = (256 * 1024) +# option CONFIG_ROM_SIZE = (256 * 1024) - (32 * 1024) +# option CONFIG_FALLBACK_SIZE = (256 * 1024) - (32 * 1024) romimage "normal" - option USE_FALLBACK_IMAGE = 0 - option ROM_IMAGE_SIZE = 64 * 1024 + option CONFIG_USE_FALLBACK_IMAGE = 0 + option CONFIG_ROM_IMAGE_SIZE = 64 * 1024 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 - option ROM_IMAGE_SIZE = 64 * 1024 + option CONFIG_USE_FALLBACK_IMAGE = 1 + option CONFIG_ROM_IMAGE_SIZE = 64 * 1024 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" -# buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" +# buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/asus/a8n_e/Config-abuild.lb b/targets/asus/a8n_e/Config-abuild.lb index 88dd1684e3..b1c927705b 100644 --- a/targets/asus/a8n_e/Config-abuild.lb +++ b/targets/asus/a8n_e/Config-abuild.lb @@ -4,33 +4,33 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/asus/a8n_e/Config.lb b/targets/asus/a8n_e/Config.lb index fc7330b96f..d805784ca4 100644 --- a/targets/asus/a8n_e/Config.lb +++ b/targets/asus/a8n_e/Config.lb @@ -23,30 +23,30 @@ target asus_a8n_e mainboard asus/a8n_e romimage "normal" - option USE_FAILOVER_IMAGE = 0 - option USE_FALLBACK_IMAGE = 0 - option ROM_IMAGE_SIZE = 128 * 1024 - option XIP_ROM_SIZE = 128 * 1024 + option CONFIG_USE_FAILOVER_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 + option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 + option CONFIG_XIP_ROM_SIZE = 128 * 1024 option COREBOOT_EXTRA_VERSION = "_Normal" payload ../payload.elf end romimage "fallback" - option USE_FAILOVER_IMAGE = 0 - option USE_FALLBACK_IMAGE = 1 - option ROM_IMAGE_SIZE = 128 * 1024 - option XIP_ROM_SIZE = 128 * 1024 + option CONFIG_USE_FAILOVER_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 1 + option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 + option CONFIG_XIP_ROM_SIZE = 128 * 1024 option COREBOOT_EXTRA_VERSION = "_Fallback" payload ../payload.elf end romimage "failover" - option USE_FAILOVER_IMAGE = 1 - option USE_FALLBACK_IMAGE = 0 - option ROM_IMAGE_SIZE = FAILOVER_SIZE - option XIP_ROM_SIZE = FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 0 + option CONFIG_ROM_IMAGE_SIZE = CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE = CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION = "_Failover" end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" -# buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" +# buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/asus/a8v-e_se/Config.lb b/targets/asus/a8v-e_se/Config.lb index 7ae42e817a..a0af2964e5 100644 --- a/targets/asus/a8v-e_se/Config.lb +++ b/targets/asus/a8v-e_se/Config.lb @@ -21,18 +21,18 @@ target asus_a8v-e_se mainboard asus/a8v-e_se romimage "normal" - option ROM_SIZE = 512 * 1024 - option USE_FALLBACK_IMAGE = 0 - option ROM_IMAGE_SIZE = 128 * 1024 + option CONFIG_ROM_SIZE = 512 * 1024 + option CONFIG_USE_FALLBACK_IMAGE = 0 + option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 option COREBOOT_EXTRA_VERSION=".0Normal" payload ../payload.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 - option ROM_IMAGE_SIZE = 128 * 1024 + option CONFIG_USE_FALLBACK_IMAGE = 1 + option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 option COREBOOT_EXTRA_VERSION=".0Fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/asus/m2v-mx_se/Config-abuild.lb b/targets/asus/m2v-mx_se/Config-abuild.lb index eaa917d109..d7357a7467 100644 --- a/targets/asus/m2v-mx_se/Config-abuild.lb +++ b/targets/asus/m2v-mx_se/Config-abuild.lb @@ -21,32 +21,32 @@ target asus_m2v-mx_se mainboard asus/m2v-mx_se option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" -## ROM_SIZE is the total number of bytes allocated for coreboot use +## CONFIG_ROM_SIZE is the total number of bytes allocated for coreboot use ## (normal AND fallback images and payloads). # The board comes with 512KB SPI flash (DIP8), 128KB is for coreboot binary # 384KB of flash is for payload/roms. -option ROM_SIZE = 512 * 1024 +option CONFIG_ROM_SIZE = 512 * 1024 -## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, +## CONFIG_ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, ## not including any payload. # Please note that 128KB is cached for (XIP) too -option ROM_IMAGE_SIZE = 128 * 1024 +option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 -## FALLBACK_SIZE is the amount of the ROM the complete fallback image +## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image ## (including payload) will use. -option FALLBACK_SIZE = ROM_SIZE +option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/asus/m2v-mx_se/Config.lb b/targets/asus/m2v-mx_se/Config.lb index f963f651da..b091732bdb 100644 --- a/targets/asus/m2v-mx_se/Config.lb +++ b/targets/asus/m2v-mx_se/Config.lb @@ -20,35 +20,35 @@ target asus_m2v-mx_se mainboard asus/m2v-mx_se -## ROM_SIZE is the total number of bytes allocated for coreboot use +## CONFIG_ROM_SIZE is the total number of bytes allocated for coreboot use ## (normal AND fallback images and payloads). # The board comes with 512KB SPI flash (DIP8), 128KB is for coreboot binary # 384KB of flash is for payload/roms. -option ROM_SIZE = 512 * 1024 +option CONFIG_ROM_SIZE = 512 * 1024 # Use following line instead if you want to use onboard VGA - # padd the rom size to 64KB or XIP won't work, complaining about # not good base. -#option ROM_SIZE = (512 * 1024) - (64 * 1024) +#option CONFIG_ROM_SIZE = (512 * 1024) - (64 * 1024) -## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, +## CONFIG_ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, ## not including any payload. # Please note that 128KB is cached for (XIP) too -option ROM_IMAGE_SIZE = 128 * 1024 +option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 -## FALLBACK_SIZE is the amount of the ROM the complete fallback image +## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image ## (including payload) will use. -option FALLBACK_SIZE = ROM_SIZE +option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/asus/mew-am/Config.lb b/targets/asus/mew-am/Config.lb index 3aef3c0ea6..ce65169529 100644 --- a/targets/asus/mew-am/Config.lb +++ b/targets/asus/mew-am/Config.lb @@ -21,29 +21,29 @@ target mew-am mainboard asus/mew-am -option ROM_SIZE = 512 * 1024 +option CONFIG_ROM_SIZE = 512 * 1024 -option MAINBOARD_VENDOR = "ASUS" -option MAINBOARD_PART_NUMBER = "MEW-AM" +option CONFIG_MAINBOARD_VENDOR = "ASUS" +option CONFIG_MAINBOARD_PART_NUMBER = "MEW-AM" -option IRQ_SLOT_COUNT = 8 +option CONFIG_IRQ_SLOT_COUNT = 8 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/asus/mew-vm/Config.lb b/targets/asus/mew-vm/Config.lb index b54ecaef3f..be75e03304 100644 --- a/targets/asus/mew-vm/Config.lb +++ b/targets/asus/mew-vm/Config.lb @@ -2,24 +2,24 @@ target mew-vm mainboard asus/mew-vm ## Without VGA BIOS -option ROM_SIZE = 512 * 1024 +option CONFIG_ROM_SIZE = 512 * 1024 ## With VGA BIOS (32k) -#option ROM_SIZE = (512 * 1024) - (32 * 1024) +#option CONFIG_ROM_SIZE = (512 * 1024) - (32 * 1024) romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /etc/hosts payload /home/amp/filo-0.5/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /etc/hosts payload /home/amp/filo-0.5/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/asus/p2b-d/Config.lb b/targets/asus/p2b-d/Config.lb index 39f23551a6..739bb77512 100644 --- a/targets/asus/p2b-d/Config.lb +++ b/targets/asus/p2b-d/Config.lb @@ -21,29 +21,29 @@ target p2b-d mainboard asus/p2b-d -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "ASUS" -option MAINBOARD_PART_NUMBER = "P2B-D" +option CONFIG_MAINBOARD_VENDOR = "ASUS" +option CONFIG_MAINBOARD_PART_NUMBER = "P2B-D" -option IRQ_SLOT_COUNT = 6 +option CONFIG_IRQ_SLOT_COUNT = 6 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload ../payload.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/asus/p2b-ds/Config.lb b/targets/asus/p2b-ds/Config.lb index 99e3739100..ca039ed372 100644 --- a/targets/asus/p2b-ds/Config.lb +++ b/targets/asus/p2b-ds/Config.lb @@ -21,29 +21,29 @@ target p2b-ds mainboard asus/p2b-ds -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "ASUS" -option MAINBOARD_PART_NUMBER = "P2B-DS" +option CONFIG_MAINBOARD_VENDOR = "ASUS" +option CONFIG_MAINBOARD_PART_NUMBER = "P2B-DS" -option IRQ_SLOT_COUNT = 7 +option CONFIG_IRQ_SLOT_COUNT = 7 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload ../payload.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/asus/p2b-f/Config.lb b/targets/asus/p2b-f/Config.lb index 48d29942d8..0c19593cef 100644 --- a/targets/asus/p2b-f/Config.lb +++ b/targets/asus/p2b-f/Config.lb @@ -21,29 +21,29 @@ target p2b-f mainboard asus/p2b-f -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "ASUS" -option MAINBOARD_PART_NUMBER = "P2B-F" +option CONFIG_MAINBOARD_VENDOR = "ASUS" +option CONFIG_MAINBOARD_PART_NUMBER = "P2B-F" -option IRQ_SLOT_COUNT = 7 +option CONFIG_IRQ_SLOT_COUNT = 7 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/asus/p2b/Config.lb b/targets/asus/p2b/Config.lb index 933d42bb06..8f5f33c3d8 100644 --- a/targets/asus/p2b/Config.lb +++ b/targets/asus/p2b/Config.lb @@ -21,29 +21,29 @@ target p2b mainboard asus/p2b -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "ASUS" -option MAINBOARD_PART_NUMBER = "P2B" +option CONFIG_MAINBOARD_VENDOR = "ASUS" +option CONFIG_MAINBOARD_PART_NUMBER = "P2B" -option IRQ_SLOT_COUNT = 6 +option CONFIG_IRQ_SLOT_COUNT = 6 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/asus/p3b-f/Config.lb b/targets/asus/p3b-f/Config.lb index b363187329..9c2eb6131b 100644 --- a/targets/asus/p3b-f/Config.lb +++ b/targets/asus/p3b-f/Config.lb @@ -21,29 +21,29 @@ target p3b-f mainboard asus/p3b-f -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "ASUS" -option MAINBOARD_PART_NUMBER = "P3B-F" +option CONFIG_MAINBOARD_VENDOR = "ASUS" +option CONFIG_MAINBOARD_PART_NUMBER = "P3B-F" -option IRQ_SLOT_COUNT = 8 +option CONFIG_IRQ_SLOT_COUNT = 8 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/axus/tc320/Config.lb b/targets/axus/tc320/Config.lb index 871fe9659a..749cd24992 100644 --- a/targets/axus/tc320/Config.lb +++ b/targets/axus/tc320/Config.lb @@ -23,7 +23,7 @@ target tc320 mainboard axus/tc320 -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 ## Enable VGA with a splash screen (only 640x480 to run on most monitors). ## We want to support up to 1024x768@16 so we need 2MiB video memory. @@ -33,19 +33,19 @@ option CONFIG_GX1_VIDEOMODE = 0 option CONFIG_SPLASH_GRAPHIC = 1 option CONFIG_VIDEO_MB = 2 -option DEFAULT_CONSOLE_LOGLEVEL = 6 -option MAXIMUM_CONSOLE_LOGLEVEL = 6 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload ../../../../../../../images/etherboot.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload ../../../../../../../images/etherboot.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/azza/pt-6ibd/Config.lb b/targets/azza/pt-6ibd/Config.lb index 8daca27159..19bceceed2 100644 --- a/targets/azza/pt-6ibd/Config.lb +++ b/targets/azza/pt-6ibd/Config.lb @@ -21,29 +21,29 @@ target pt-6ibd mainboard azza/pt-6ibd -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "AZZA" -option MAINBOARD_PART_NUMBER = "PT-6IBD" +option CONFIG_MAINBOARD_VENDOR = "AZZA" +option CONFIG_MAINBOARD_PART_NUMBER = "PT-6IBD" -option IRQ_SLOT_COUNT = 7 +option CONFIG_IRQ_SLOT_COUNT = 7 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/bcom/winnet100/Config.lb b/targets/bcom/winnet100/Config.lb index ec5210fe68..de81d0f75d 100644 --- a/targets/bcom/winnet100/Config.lb +++ b/targets/bcom/winnet100/Config.lb @@ -23,7 +23,7 @@ target winnet100 mainboard bcom/winnet100 -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 ## Enable VGA with a splash screen (only 640x480 to run on most monitors). ## We want to support up to 1024x768@16 so we need 2MiB video memory. @@ -33,21 +33,21 @@ option CONFIG_GX1_VIDEOMODE = 0 option CONFIG_SPLASH_GRAPHIC = 1 option CONFIG_VIDEO_MB = 2 -option DEFAULT_CONSOLE_LOGLEVEL = 6 -option MAXIMUM_CONSOLE_LOGLEVEL = 6 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6 romimage "normal" - option USE_FALLBACK_IMAGE = 0 - option ROM_IMAGE_SIZE = 64 * 1024 + option CONFIG_USE_FALLBACK_IMAGE = 0 + option CONFIG_ROM_IMAGE_SIZE = 64 * 1024 option COREBOOT_EXTRA_VERSION = ".0Normal" payload ../../../../../../../images/etherboot.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 - option ROM_IMAGE_SIZE = 64 * 1024 + option CONFIG_USE_FALLBACK_IMAGE = 1 + option CONFIG_ROM_IMAGE_SIZE = 64 * 1024 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload ../../../../../../../images/etherboot.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/bcom/winnetp680/Config-abuild.lb b/targets/bcom/winnetp680/Config-abuild.lb index d364cb7cbd..2a65acae0d 100644 --- a/targets/bcom/winnetp680/Config-abuild.lb +++ b/targets/bcom/winnetp680/Config-abuild.lb @@ -4,18 +4,18 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/bcom/winnetp680/Config.lb b/targets/bcom/winnetp680/Config.lb index 079e2ec8b3..ced4de9ba8 100644 --- a/targets/bcom/winnetp680/Config.lb +++ b/targets/bcom/winnetp680/Config.lb @@ -22,24 +22,24 @@ target bcom-winnet-p680 mainboard bcom/winnetp680 -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 # coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 # # If space is allotted for a VGA BIOS, # generate the final ROM like this: # cat vgabios bochsbios coreboot.rom > coreboot.rom.final # -#option ROM_SIZE = (512 * 1024) - (63 * 1024) - (64 * 1024) -option ROM_SIZE = (512 * 1024) +#option CONFIG_ROM_SIZE = (512 * 1024) - (63 * 1024) - (64 * 1024) +option CONFIG_ROM_SIZE = (512 * 1024) romimage "image" option COREBOOT_EXTRA_VERSION = "-winnetp680" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" diff --git a/targets/biostar/m6tba/Config.lb b/targets/biostar/m6tba/Config.lb index 6439c4e926..f3ab12fb00 100644 --- a/targets/biostar/m6tba/Config.lb +++ b/targets/biostar/m6tba/Config.lb @@ -22,29 +22,29 @@ target m6tba mainboard biostar/m6tba # Note: The original flash ROM chip is 128 KB. -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "Biostar" -option MAINBOARD_PART_NUMBER = "M6TBA" +option CONFIG_MAINBOARD_VENDOR = "Biostar" +option CONFIG_MAINBOARD_PART_NUMBER = "M6TBA" -option IRQ_SLOT_COUNT = 7 +option CONFIG_IRQ_SLOT_COUNT = 7 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/broadcom/blast/Config.lb b/targets/broadcom/blast/Config.lb index e65ed1ec97..9cef8d621f 100644 --- a/targets/broadcom/blast/Config.lb +++ b/targets/broadcom/blast/Config.lb @@ -7,17 +7,17 @@ mainboard broadcom/blast romimage "normal" # 48K for ATI rom - option ROM_SIZE = 512*1024-48*1024 + option CONFIG_ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-48*1024 # 64K for Etherboot -# option ROM_SIZE = 512*1024-64*1024 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x17800 -# option ROM_IMAGE_SIZE=0x15000 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 512*1024-64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 +# option CONFIG_ROM_IMAGE_SIZE=0x15000 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -37,12 +37,12 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x17800 -# option ROM_IMAGE_SIZE=0x15000 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 +# option CONFIG_ROM_IMAGE_SIZE=0x15000 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -62,4 +62,4 @@ romimage "fallback" # payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_com2.zelf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/compaq/deskpro_en_sff_p600/Config.lb b/targets/compaq/deskpro_en_sff_p600/Config.lb index c14ae1d067..8df90b72d3 100644 --- a/targets/compaq/deskpro_en_sff_p600/Config.lb +++ b/targets/compaq/deskpro_en_sff_p600/Config.lb @@ -21,29 +21,29 @@ target deskpro_en_sff_p600 mainboard compaq/deskpro_en_sff_p600 -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "Compaq" -option MAINBOARD_PART_NUMBER = "Deskpro EN SFF P600" +option CONFIG_MAINBOARD_VENDOR = "Compaq" +option CONFIG_MAINBOARD_PART_NUMBER = "Deskpro EN SFF P600" -option IRQ_SLOT_COUNT = 5 +option CONFIG_IRQ_SLOT_COUNT = 5 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/dell/s1850/Config.lb b/targets/dell/s1850/Config.lb index 05a26bff66..75eb19d655 100644 --- a/targets/dell/s1850/Config.lb +++ b/targets/dell/s1850/Config.lb @@ -1,24 +1,24 @@ target s1850 mainboard dell/s1850 -option ROM_SIZE=1024*1024 -option MAXIMUM_CONSOLE_LOGLEVEL=9 -option DEFAULT_CONSOLE_LOGLEVEL=9 +option CONFIG_ROM_SIZE=1024*1024 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=9 romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x16000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x16000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload ../../../payloads/filo.elf payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x16000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x16000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload ../../../payloads/filo.elf payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/digitallogic/adl855pc/Config.lb b/targets/digitallogic/adl855pc/Config.lb index 18372414a2..91021374ca 100644 --- a/targets/digitallogic/adl855pc/Config.lb +++ b/targets/digitallogic/adl855pc/Config.lb @@ -4,20 +4,20 @@ target adl855pc mainboard digitallogic/adl855pc -option DEFAULT_CONSOLE_LOGLEVEL=9 -option MAXIMUM_CONSOLE_LOGLEVEL=9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9 romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" payload /etc/hosts end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" payload /etc/hosts end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/digitallogic/msm586seg/Config-abuild.lb b/targets/digitallogic/msm586seg/Config-abuild.lb index 7efa9040ec..9b5b027c16 100644 --- a/targets/digitallogic/msm586seg/Config-abuild.lb +++ b/targets/digitallogic/msm586seg/Config-abuild.lb @@ -2,18 +2,18 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "fallback" - option FALLBACK_SIZE = 256 * 1024 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE= 128 * 1024 + option CONFIG_FALLBACK_SIZE = 256 * 1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE= 128 * 1024 option COREBOOT_EXTRA_VERSION=".0Fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/digitallogic/msm586seg/Config.lb b/targets/digitallogic/msm586seg/Config.lb index 565434c238..a2ad579644 100644 --- a/targets/digitallogic/msm586seg/Config.lb +++ b/targets/digitallogic/msm586seg/Config.lb @@ -3,30 +3,30 @@ mainboard digitallogic/msm586seg -option DEFAULT_CONSOLE_LOGLEVEL=3 -option MAXIMUM_CONSOLE_LOGLEVEL=3 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=3 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=3 option CONFIG_COMPRESS=0 option CONFIG_CONSOLE_VGA=0 #romimage "normal" -# option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x10000 +# option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x10000 # option COREBOOT_EXTRA_VERSION=".0Normal" # payload /etc/hosts #end romimage "fallback" - option FALLBACK_SIZE = 256 * 1024 -# option ROM_SIZE=512*1024 -# option ROM_SECTION_SIZE=512*1024 - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=32 * 1024 # 0x8000 - option ROM_IMAGE_SIZE=128 * 1024 # 0x10000 -# option ROM_IMAGE_SIZE=512 * 1024 # 0x10000 + option CONFIG_FALLBACK_SIZE = 256 * 1024 +# option CONFIG_ROM_SIZE=512*1024 +# option CONFIG_ROM_SECTION_SIZE=512*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=32 * 1024 # 0x8000 + option CONFIG_ROM_IMAGE_SIZE=128 * 1024 # 0x10000 +# option CONFIG_ROM_IMAGE_SIZE=512 * 1024 # 0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" payload ../../filo.elf # payload ../../eepro100--ide_disk.zelf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/digitallogic/msm800sev/Config.lb b/targets/digitallogic/msm800sev/Config.lb index 83ca2f60b9..473556bea7 100644 --- a/targets/digitallogic/msm800sev/Config.lb +++ b/targets/digitallogic/msm800sev/Config.lb @@ -5,24 +5,24 @@ mainboard digitallogic/msm800sev option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0 -## ROM_SIZE is the total number of bytes allocated for coreboot use +## CONFIG_ROM_SIZE is the total number of bytes allocated for coreboot use ## (normal AND fallback images and payloads). ## leave 36k for vsa ## -option ROM_SIZE = 1024*1024 - 36 * 1024 +option CONFIG_ROM_SIZE = 1024*1024 - 36 * 1024 -## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, +## CONFIG_ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, ## not including any payload. -option ROM_IMAGE_SIZE=64*1024 +option CONFIG_ROM_IMAGE_SIZE=64*1024 -option FALLBACK_SIZE = ROM_SIZE +option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 option COREBOOT_EXTRA_VERSION=".0Fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/eaglelion/5bcm/Config.lb b/targets/eaglelion/5bcm/Config.lb index b237190ad9..323ab7a623 100644 --- a/targets/eaglelion/5bcm/Config.lb +++ b/targets/eaglelion/5bcm/Config.lb @@ -4,11 +4,11 @@ target 5bcm mainboard eaglelion/5bcm -option ROM_SIZE=256*1024 +option CONFIG_ROM_SIZE=256*1024 romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -18,8 +18,8 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -28,4 +28,4 @@ romimage "fallback" payload /home/hamish/work/etherboot/eb-5.2.6-lne100.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/embeddedplanet/ep405pc/Config.lb b/targets/embeddedplanet/ep405pc/Config.lb index ba794badf6..0f7d13040f 100644 --- a/targets/embeddedplanet/ep405pc/Config.lb +++ b/targets/embeddedplanet/ep405pc/Config.lb @@ -6,10 +6,10 @@ mainboard embeddedplanet/ep405pc romimage "normal" ## Enable PPC405 instructions - option CPU_OPT="-mcpu=405" + option CONFIG_CPU_OPT="-mcpu=405" ## use a cross compiler - #option CROSS_COMPILE="powerpc-ibm-eabi-" + #option CONFIG_CROSS_COMPILE="powerpc-ibm-eabi-" ## Use stage 1 initialization code option CONFIG_USE_INIT=1 @@ -21,14 +21,14 @@ romimage "normal" option CONFIG_COMPRESS=0 ## Turn off POST codes - option NO_POST=1 + option CONFIG_NO_POST=1 ## Enable serial console - option DEFAULT_CONSOLE_LOGLEVEL=8 + option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 # Divisor of 69 == 9600 baud due to weird clocking - option TTYS0_DIV=69 - option TTYS0_BAUD=9600 + option CONFIG_TTYS0_DIV=69 + option CONFIG_TTYS0_BAUD=9600 ## Boot linux from IDE option CONFIG_IDE=1 @@ -36,25 +36,25 @@ romimage "normal" option CONFIG_FS_EXT2=1 option CONFIG_FS_ISO9660=1 option CONFIG_FS_FAT=1 - option AUTOBOOT_CMDLINE="hda1:/vmlinuz" + option CONFIG_AUTOBOOT_CMDLINE="hda1:/vmlinuz" - option ROM_SIZE=1024*1024 + option CONFIG_ROM_SIZE=1024*1024 ## Board has fixed size RAM - option EMBEDDED_RAM_SIZE=64*1024*1024 + option CONFIG_EMBEDDED_RAM_SIZE=64*1024*1024 ## Coreboot C code runs at this location in RAM - option _RAMBASE=0x00100000 + option CONFIG_RAMBASE=0x00100000 ## ## Use a 64K stack ## - option STACK_SIZE=0x10000 + option CONFIG_STACK_SIZE=0x10000 ## ## Use a 64K heap ## - option HEAP_SIZE=0x10000 + option CONFIG_HEAP_SIZE=0x10000 ## ## System clock @@ -62,20 +62,20 @@ romimage "normal" option CONFIG_SYS_CLK_FREQ=33 ## - option _ROMBASE=0xfff00000 + option CONFIG_ROMBASE=0xfff00000 ## Reset vector address - option _RESET=0xfffffffc + option CONFIG_RESET=0xfffffffc ## Exception vectors - option _EXCEPTION_VECTORS=_ROMBASE+0x100 + option CONFIG_EXCEPTION_VECTORS=CONFIG_ROMBASE+0x100 ## coreboot ROM start address - option _ROMSTART=0xfff03000 + option CONFIG_ROMSTART=0xfff03000 ## coreboot C code runs at this location in RAM - option _RAMBASE=0x00100000 + option CONFIG_RAMBASE=0x00100000 end -buildrom ./coreboot.rom ROM_SIZE "normal" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" diff --git a/targets/emulation/qemu-x86/Config-abuild.lb b/targets/emulation/qemu-x86/Config-abuild.lb index bcfc9c5aad..0d537cad91 100644 --- a/targets/emulation/qemu-x86/Config-abuild.lb +++ b/targets/emulation/qemu-x86/Config-abuild.lb @@ -2,17 +2,17 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 option COREBOOT_EXTRA_VERSION=".0" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/emulation/qemu-x86/Config-car.lb b/targets/emulation/qemu-x86/Config-car.lb index bdb27bc9cd..00b2200b2e 100644 --- a/targets/emulation/qemu-x86/Config-car.lb +++ b/targets/emulation/qemu-x86/Config-car.lb @@ -3,24 +3,24 @@ target qemu-x86-car mainboard emulation/qemu-x86 -option USE_DCACHE_RAM=1 +option CONFIG_USE_DCACHE_RAM=1 option CONFIG_USE_INIT=1 -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 option CONFIG_USE_INIT=1 option CONFIG_USE_PRINTK_IN_CAR=1 option CC="gcc -m32" -option HAVE_PIRQ_TABLE=1 -option IRQ_SLOT_COUNT=6 +option CONFIG_HAVE_PIRQ_TABLE=1 +option CONFIG_IRQ_SLOT_COUNT=6 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION="-GRUB2" # payload /home/stepan/core.img payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/emulation/qemu-x86/Config-lab.lb b/targets/emulation/qemu-x86/Config-lab.lb index 970b95295d..2e38aa1fd1 100644 --- a/targets/emulation/qemu-x86/Config-lab.lb +++ b/targets/emulation/qemu-x86/Config-lab.lb @@ -3,19 +3,19 @@ target qemu-x86 mainboard emulation/qemu-x86 -option ROM_SIZE=2048*1024 +option CONFIG_ROM_SIZE=2048*1024 option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=1 option CC="gcc -m32" -option HAVE_PIRQ_TABLE=1 -option IRQ_SLOT_COUNT=6 +option CONFIG_HAVE_PIRQ_TABLE=1 +option CONFIG_IRQ_SLOT_COUNT=6 romimage "image" option COREBOOT_EXTRA_VERSION="-LAB" payload ../payload.elf.lzma end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" diff --git a/targets/emulation/qemu-x86/Config.OLPC.lb b/targets/emulation/qemu-x86/Config.OLPC.lb index 93c4fb3557..6f5b2abe4c 100644 --- a/targets/emulation/qemu-x86/Config.OLPC.lb +++ b/targets/emulation/qemu-x86/Config.OLPC.lb @@ -3,19 +3,19 @@ target qemu-x86-OLPC mainboard emulation/qemu-x86 -option ROM_SIZE=1024*1024 - (128 * 1024) +option CONFIG_ROM_SIZE=1024*1024 - (128 * 1024) option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=0 option CC="gcc -m32" -option HAVE_PIRQ_TABLE=1 -option IRQ_SLOT_COUNT=6 +option CONFIG_HAVE_PIRQ_TABLE=1 +option CONFIG_IRQ_SLOT_COUNT=6 romimage "image" option COREBOOT_EXTRA_VERSION="-OpenBIOS" payload /tmp/olpcpayload.elf end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" diff --git a/targets/emulation/qemu-x86/Config.lb b/targets/emulation/qemu-x86/Config.lb index 91d4413725..659da67358 100644 --- a/targets/emulation/qemu-x86/Config.lb +++ b/targets/emulation/qemu-x86/Config.lb @@ -3,14 +3,14 @@ target qemu-x86 mainboard emulation/qemu-x86 -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 option CC="gcc -m32" -option HAVE_PIRQ_TABLE=1 -option IRQ_SLOT_COUNT=6 -option DEFAULT_CONSOLE_LOGLEVEL=9 -option MAXIMUM_CONSOLE_LOGLEVEL=9 +option CONFIG_HAVE_PIRQ_TABLE=1 +option CONFIG_IRQ_SLOT_COUNT=6 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9 romimage "normal" option COREBOOT_EXTRA_VERSION="-GRUB2" @@ -18,5 +18,5 @@ romimage "normal" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" diff --git a/targets/gigabyte/ga-6bxc/Config.lb b/targets/gigabyte/ga-6bxc/Config.lb index 12f259087c..4efbcb6398 100644 --- a/targets/gigabyte/ga-6bxc/Config.lb +++ b/targets/gigabyte/ga-6bxc/Config.lb @@ -21,29 +21,29 @@ target ga-6bxc mainboard gigabyte/ga-6bxc -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "GIGABYTE" -option MAINBOARD_PART_NUMBER = "GA-6BXC" +option CONFIG_MAINBOARD_VENDOR = "GIGABYTE" +option CONFIG_MAINBOARD_PART_NUMBER = "GA-6BXC" -option IRQ_SLOT_COUNT = 6 +option CONFIG_IRQ_SLOT_COUNT = 6 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/gigabyte/ga_2761gxdk/Config-abuild.lb b/targets/gigabyte/ga_2761gxdk/Config-abuild.lb index bba261153c..14e83807e8 100644 --- a/targets/gigabyte/ga_2761gxdk/Config-abuild.lb +++ b/targets/gigabyte/ga_2761gxdk/Config-abuild.lb @@ -23,39 +23,39 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE = 512*1024 +option CONFIG_ROM_SIZE = 512*1024 romimage "normal" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x28000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x28000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION=".0-Normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION=".0-Fallback" payload __PAYLOAD__ end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION=".0-Failover" end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/gigabyte/ga_2761gxdk/Config.lb b/targets/gigabyte/ga_2761gxdk/Config.lb index fc802f24a2..1266366e80 100644 --- a/targets/gigabyte/ga_2761gxdk/Config.lb +++ b/targets/gigabyte/ga_2761gxdk/Config.lb @@ -26,33 +26,33 @@ mainboard gigabyte/ga_2761gxdk romimage "normal" # 32K for VGA BIOS - option ROM_SIZE = (512*1024 - 32*1024) + option CONFIG_ROM_SIZE = (512*1024 - 32*1024) - option USE_FAILOVER_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../../payloads/filo_uda1.elf payload ../payload.elf end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../../payloads/filo_uda1.elf payload ../payload.elf end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -# buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" - buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +# buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" + buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/gigabyte/m57sli/Config-abuild.lb b/targets/gigabyte/m57sli/Config-abuild.lb index 88dd1684e3..b1c927705b 100644 --- a/targets/gigabyte/m57sli/Config-abuild.lb +++ b/targets/gigabyte/m57sli/Config-abuild.lb @@ -4,33 +4,33 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/gigabyte/m57sli/Config-lab.lb b/targets/gigabyte/m57sli/Config-lab.lb index 06435429d9..6ed4f11656 100644 --- a/targets/gigabyte/m57sli/Config-lab.lb +++ b/targets/gigabyte/m57sli/Config-lab.lb @@ -24,26 +24,26 @@ target m57sli mainboard gigabyte/m57sli -option ROM_SIZE=0x100000 -option FALLBACK_SIZE=(ROM_SIZE-0x1000) +option CONFIG_ROM_SIZE=0x100000 +option CONFIG_FALLBACK_SIZE=(CONFIG_ROM_SIZE-0x1000) romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=1 - option ROM_IMAGE_SIZE=0x17000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_ROM_IMAGE_SIZE=0x17000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" payload ../payload.elf.lzma end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" "failover" diff --git a/targets/gigabyte/m57sli/Config.lb b/targets/gigabyte/m57sli/Config.lb index 5a61bede5b..06d26eba5c 100644 --- a/targets/gigabyte/m57sli/Config.lb +++ b/targets/gigabyte/m57sli/Config.lb @@ -25,20 +25,20 @@ mainboard gigabyte/m57sli # serengeti_leopard romimage "normal" # 48K for SCSI FW -# option ROM_SIZE = 475136 +# option CONFIG_ROM_SIZE = 475136 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 425984 +# option CONFIG_ROM_SIZE = 425984 # 64K for Etherboot -# option ROM_SIZE = 458752 +# option CONFIG_ROM_SIZE = 458752 # 44k for atixx.rom -# option ROM_SIZE = 479232 - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x18800 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 +# option CONFIG_ROM_SIZE = 479232 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x18800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -61,13 +61,13 @@ romimage "normal" end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x19800 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x19800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -95,12 +95,12 @@ romimage "fallback" end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/gigabyte/m57sli/Config.lb.kernel b/targets/gigabyte/m57sli/Config.lb.kernel index 6485e6c461..e5952e3785 100644 --- a/targets/gigabyte/m57sli/Config.lb.kernel +++ b/targets/gigabyte/m57sli/Config.lb.kernel @@ -24,19 +24,19 @@ target m57sli mainboard gigabyte/m57sli -option ROM_SIZE=0x200000 -option FALLBACK_SIZE=(ROM_SIZE-0x1000) +option CONFIG_ROM_SIZE=0x200000 +option CONFIG_FALLBACK_SIZE=(CONFIG_ROM_SIZE-0x1000) romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=1 -# option ROM_IMAGE_SIZE=0x19800 - option ROM_IMAGE_SIZE=0x17000 -# option ROM_IMAGE_SIZE=0x15800 -# option ROM_IMAGE_SIZE=0x13800 - option XIP_ROM_SIZE=0x40000 +# option CONFIG_ROM_IMAGE_SIZE=0x19800 + option CONFIG_ROM_IMAGE_SIZE=0x17000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -65,13 +65,13 @@ romimage "fallback" end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" "failover" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/hp/dl145_g3/Config.lb b/targets/hp/dl145_g3/Config.lb index 47aae1b225..c66a94fc83 100644 --- a/targets/hp/dl145_g3/Config.lb +++ b/targets/hp/dl145_g3/Config.lb @@ -24,16 +24,16 @@ target dl145_g3 mainboard hp/dl145_g3 -option ROM_SIZE= 1024*1024 +option CONFIG_ROM_SIZE= 1024*1024 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" payload ./bios.bin.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" pci_rom ./matrox.rom vendor_id=0x102b device_id=0x0522 diff --git a/targets/ibm/e325/Config.lb b/targets/ibm/e325/Config.lb index 8e492d5a53..cd1a055815 100644 --- a/targets/ibm/e325/Config.lb +++ b/targets/ibm/e325/Config.lb @@ -14,16 +14,16 @@ mainboard ibm/e325 # # Arima hdama romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload ../../filo.elf payload ../../../payloads/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload ../../filo.elf payload ../../../payloads/filo.elf @@ -31,4 +31,4 @@ romimage "fallback" # payload /etc/hosts end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/ibm/e326/Config-abuild.lb b/targets/ibm/e326/Config-abuild.lb index 44cec1431d..03331da64c 100644 --- a/targets/ibm/e326/Config-abuild.lb +++ b/targets/ibm/e326/Config-abuild.lb @@ -4,25 +4,25 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/ibm/e326/Config.lb b/targets/ibm/e326/Config.lb index 8129dd6ab5..34ba0d9eeb 100644 --- a/targets/ibm/e326/Config.lb +++ b/targets/ibm/e326/Config.lb @@ -10,16 +10,16 @@ mainboard ibm/e326 ### romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload ../../filo.elf payload ../../../payloads/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload ../../filo.elf payload ../../../payloads/filo.elf @@ -27,4 +27,4 @@ romimage "fallback" # payload /etc/hosts end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/iei/juki-511p/Config-abuild.lb b/targets/iei/juki-511p/Config-abuild.lb index 3c203bdd9b..f26e780cf3 100644 --- a/targets/iei/juki-511p/Config-abuild.lb +++ b/targets/iei/juki-511p/Config-abuild.lb @@ -2,31 +2,31 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=256*1024 +option CONFIG_ROM_SIZE=256*1024 ### ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -option FALLBACK_SIZE=128*1024 +option CONFIG_FALLBACK_SIZE=128*1024 romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION=".0-Normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=64*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION=".0-Fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/iei/juki-511p/Config.lb b/targets/iei/juki-511p/Config.lb index 5015562285..83fa1ffa67 100644 --- a/targets/iei/juki-511p/Config.lb +++ b/targets/iei/juki-511p/Config.lb @@ -21,17 +21,17 @@ target juki-511p mainboard iei/juki-511p -option ROM_SIZE=256*1024 +option CONFIG_ROM_SIZE=256*1024 -option HAVE_PIRQ_TABLE=1 +option CONFIG_HAVE_PIRQ_TABLE=1 option CONFIG_COMPRESS=0 option CONFIG_PRECOMPRESSED_PAYLOAD=0 romimage "image" - option ROM_IMAGE_SIZE=64*1024 + option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION="-filo" payload ../../filo.elf end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" diff --git a/targets/iei/nova4899r/Config.lb b/targets/iei/nova4899r/Config.lb index ec2e76f588..7a7e108fb2 100644 --- a/targets/iei/nova4899r/Config.lb +++ b/targets/iei/nova4899r/Config.lb @@ -24,24 +24,24 @@ target nova4899r mainboard iei/nova4899r -#option ROM_SIZE=256*1024 +#option CONFIG_ROM_SIZE=256*1024 #from OLPC definitions option CONFIG_COMPRESSED_PAYLOAD_NRV2B=1 #option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 #option CONFIG_PRECOMPRESSED_PAYLOAD=0 # leave 128k for vsa and 32k for VGA code -option ROM_SIZE=(256*1024)-(128*1024)-(32*1024) -option FALLBACK_SIZE=ROM_SIZE +option CONFIG_ROM_SIZE=(256*1024)-(128*1024)-(32*1024) +option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE -option DEFAULT_CONSOLE_LOGLEVEL = 8 -option MAXIMUM_CONSOLE_LOGLEVEL = 8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=64*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION=".0Fallback" payload /opt/coreboot-SVN/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" #"normal" diff --git a/targets/iei/pcisa-lx-800-r10/Config.lb b/targets/iei/pcisa-lx-800-r10/Config.lb index 7993fa6aaa..8b848065b3 100644 --- a/targets/iei/pcisa-lx-800-r10/Config.lb +++ b/targets/iei/pcisa-lx-800-r10/Config.lb @@ -27,20 +27,20 @@ option CONFIG_COMPRESSED_PAYLOAD_NRV2B = 0 option CONFIG_COMPRESSED_PAYLOAD_LZMA = 0 # Leave 36k for VSA. -option ROM_SIZE = (512 * 1024) - (36 * 1024) -# option ROM_SIZE = (2048 * 1024) - (36 * 1024) +option CONFIG_ROM_SIZE = (512 * 1024) - (36 * 1024) +# option CONFIG_ROM_SIZE = (2048 * 1024) - (36 * 1024) # Leave 36k for VSA, 1152k for bzImage and 750k for initrd. -# option ROM_SIZE = (2048 * 1024) - (36 * 1024) - (1152 * 1024) - (750 * 1024) -option FALLBACK_SIZE = ROM_SIZE +# option CONFIG_ROM_SIZE = (2048 * 1024) - (36 * 1024) - (1152 * 1024) - (750 * 1024) +option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE -option DEFAULT_CONSOLE_LOGLEVEL = 0 -option MAXIMUM_CONSOLE_LOGLEVEL = 0 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0 romimage "fallback" - option USE_FALLBACK_IMAGE = 1 - option ROM_IMAGE_SIZE = 80 * 1024 + option CONFIG_USE_FALLBACK_IMAGE = 1 + option CONFIG_ROM_IMAGE_SIZE = 80 * 1024 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/intel/mtarvon/Config.lb b/targets/intel/mtarvon/Config.lb index 432bf6a1c2..87dc4f9d45 100644 --- a/targets/intel/mtarvon/Config.lb +++ b/targets/intel/mtarvon/Config.lb @@ -20,21 +20,21 @@ target mtarvon mainboard intel/mtarvon -## ROM_SIZE is the total number of bytes allocated for coreboot use +## CONFIG_ROM_SIZE is the total number of bytes allocated for coreboot use ## (normal AND fallback images and payloads). -option ROM_SIZE = 2 * 1024 * 1024 +option CONFIG_ROM_SIZE = 2 * 1024 * 1024 -## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, +## CONFIG_ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, ## not including any payload. -option ROM_IMAGE_SIZE = 128 * 1024 +option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 -## FALLBACK_SIZE is the amount of the ROM the complete fallback image +## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image ## (including payload) will use -option FALLBACK_SIZE = ROM_SIZE +option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/intel/truxton/Config.lb b/targets/intel/truxton/Config.lb index 3b1a580fd9..669c1c00cc 100644 --- a/targets/intel/truxton/Config.lb +++ b/targets/intel/truxton/Config.lb @@ -20,21 +20,21 @@ target truxton mainboard intel/truxton -## ROM_SIZE is the total number of bytes allocated for coreboot use +## CONFIG_ROM_SIZE is the total number of bytes allocated for coreboot use ## (normal AND fallback images and payloads). -option ROM_SIZE = 2 * 1024 * 1024 +option CONFIG_ROM_SIZE = 2 * 1024 * 1024 -## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, +## CONFIG_ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, ## not including any payload. -option ROM_IMAGE_SIZE = 128 * 1024 +option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 -## FALLBACK_SIZE is the amount of the ROM the complete fallback image +## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image ## (including payload) will use -option FALLBACK_SIZE = ROM_SIZE +option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/intel/xe7501devkit/Config.lb b/targets/intel/xe7501devkit/Config.lb index b421f1b005..00f9451984 100644 --- a/targets/intel/xe7501devkit/Config.lb +++ b/targets/intel/xe7501devkit/Config.lb @@ -1,22 +1,22 @@ target xe7501devkit mainboard intel/xe7501devkit -## ROM_SIZE is the total number of bytes allocated for coreboot use +## CONFIG_ROM_SIZE is the total number of bytes allocated for coreboot use ## (normal AND fallback images and payloads). -option ROM_SIZE = 192*1024 +option CONFIG_ROM_SIZE = 192*1024 -## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, +## CONFIG_ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, ## not including any payload. -option ROM_IMAGE_SIZE = 0x1B000 +option CONFIG_ROM_IMAGE_SIZE = 0x1B000 -## FALLBACK_SIZE is the amount of the ROM the complete fallback image +## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image ## (including payload) will use -option FALLBACK_SIZE = 0 +option CONFIG_FALLBACK_SIZE = 0 romimage "normal" - option USE_FALLBACK_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 # option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../../../../../memtest86/memtest # payload ../../../../../../../etherboot/src/bin/e1000.zelf @@ -27,11 +27,11 @@ end #NOTE: CMOS currently not supported due to conflicts with factory BIOS # Thus no support for fallback boot. #romimage "fallback" -# option USE_FALLBACK_IMAGE=1 +# option CONFIG_USE_FALLBACK_IMAGE=1 # option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../../../../../memtest86/memtest # payload ../../../../../../../etherboot/src/bin/e1000.zelf # payload ../../../../../../../etherboot/src/bin/e1000--filo.zelf #end -buildrom ./coreboot.rom ROM_SIZE "normal" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" diff --git a/targets/iwill/dk8_htx/Config-abuild.lb b/targets/iwill/dk8_htx/Config-abuild.lb index 88dd1684e3..b1c927705b 100644 --- a/targets/iwill/dk8_htx/Config-abuild.lb +++ b/targets/iwill/dk8_htx/Config-abuild.lb @@ -4,33 +4,33 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/iwill/dk8_htx/Config.lb b/targets/iwill/dk8_htx/Config.lb index 842bd3d021..460dcc417d 100644 --- a/targets/iwill/dk8_htx/Config.lb +++ b/targets/iwill/dk8_htx/Config.lb @@ -5,18 +5,18 @@ mainboard iwill/dk8_htx # serengeti_leopard romimage "normal" # 48K for SCSI FW -# option ROM_SIZE = 475136 +# option CONFIG_ROM_SIZE = 475136 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 425984 +# option CONFIG_ROM_SIZE = 425984 # 64K for Etherboot -# option ROM_SIZE = 458752 - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x17800 -# option ROM_IMAGE_SIZE=0x15800 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 458752 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -36,13 +36,13 @@ romimage "normal" end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x17800 -# option ROM_IMAGE_SIZE=0x15800 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -63,12 +63,12 @@ romimage "fallback" end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/iwill/dk8s2/Config.lb b/targets/iwill/dk8s2/Config.lb index c239a163ad..e4b426fc6f 100644 --- a/targets/iwill/dk8s2/Config.lb +++ b/targets/iwill/dk8s2/Config.lb @@ -6,13 +6,13 @@ target dk8s2 mainboard iwill/dk8s2 -option HAVE_HARD_RESET=1 +option CONFIG_HAVE_HARD_RESET=1 -option HAVE_OPTION_TABLE=1 -option HAVE_MP_TABLE=1 -option ROM_SIZE=1024*1024 +option CONFIG_HAVE_OPTION_TABLE=1 +option CONFIG_HAVE_MP_TABLE=1 +option CONFIG_ROM_SIZE=1024*1024 -option HAVE_FALLBACK_BOOT=1 +option CONFIG_HAVE_FALLBACK_BOOT=1 #option CONFIG_LSI_SCSI_FW_FIXUP=1 @@ -21,8 +21,8 @@ option HAVE_FALLBACK_BOOT=1 ### ### Build code to export a programmable irq routing table ### -option HAVE_PIRQ_TABLE=1 -option IRQ_SLOT_COUNT=12 +option CONFIG_HAVE_PIRQ_TABLE=1 +option CONFIG_IRQ_SLOT_COUNT=12 # ### ### Build code for SMP support @@ -39,7 +39,7 @@ option CONFIG_MAX_PHYSICAL_CPUS=2 option CONFIG_IOAPIC=1 # ### -### MEMORY_HOLE instructs earlymtrr.inc to +### CONFIG_MEMORY_HOLE instructs earlymtrr.inc to ### enable caching from 0-640KB and to disable ### caching from 640KB-1MB using fixed MTRRs ### @@ -47,24 +47,24 @@ option CONFIG_IOAPIC=1 ### CPU identification depends on only variable MTRRs ### being enabled. ### -#option MEMORY_HOLE=0 +#option CONFIG_MEMORY_HOLE=0 # ### ### Clean up the motherboard id strings ### -option MAINBOARD_PART_NUMBER="DK8S2" -option MAINBOARD_VENDOR="IWILL" +option CONFIG_MAINBOARD_PART_NUMBER="DK8S2" +option CONFIG_MAINBOARD_VENDOR="IWILL" # ### ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -#option FALLBACK_SIZE=524288 -#option FALLBACK_SIZE=98304 -option FALLBACK_SIZE=131072 +#option CONFIG_FALLBACK_SIZE=524288 +#option CONFIG_FALLBACK_SIZE=98304 +option CONFIG_FALLBACK_SIZE=131072 -## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. -option ROM_IMAGE_SIZE=65536 +## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. +option CONFIG_ROM_IMAGE_SIZE=65536 ### @@ -77,7 +77,7 @@ option ROM_IMAGE_SIZE=65536 #option CONFIG_COMPRESS=1 option CONFIG_CONSOLE_SERIAL8250=1 -option TTYS0_BAUD=115200 +option CONFIG_TTYS0_BAUD=115200 ## ### Select the coreboot loglevel @@ -89,30 +89,30 @@ option TTYS0_BAUD=115200 ## WARNING 5 warning conditions ## NOTICE 6 normal but significant condition ## INFO 7 informational -## DEBUG 8 debug-level messages +## CONFIG_DEBUG 8 debug-level messages ## SPEW 9 Way too many details ## Request this level of debugging output -option DEFAULT_CONSOLE_LOGLEVEL=7 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 ## At a maximum only compile in this level of debugging -option MAXIMUM_CONSOLE_LOGLEVEL=7 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=7 -#option DEBUG=1 +#option CONFIG_DEBUG=1 # ## Coreboot C code runs at this location in RAM -option _RAMBASE=0x004000 +option CONFIG_RAMBASE=0x004000 ## ## Use a 32K stack ## -option STACK_SIZE=0x8000 +option CONFIG_STACK_SIZE=0x8000 ## ## Use a 56K heap ## -option HEAP_SIZE=0xe000 +option CONFIG_HEAP_SIZE=0xe000 # ### @@ -125,22 +125,22 @@ option CONFIG_ROM_PAYLOAD = 1 # romimage "normal" # 48K for SCSI FW -# option ROM_SIZE = 512*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-48*1024 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" - option USE_FALLBACK_IMAGE=0 - option ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - option ROM_SECTION_OFFSET= 0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_SECTION_SIZE = (CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE) + option CONFIG_ROM_SECTION_OFFSET= 0 - option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) - option CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - option _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) + option CONFIG_PAYLOAD_SIZE = (CONFIG_ROM_SECTION_SIZE - CONFIG_ROM_IMAGE_SIZE) + option CONFIG_ROM_PAYLOAD_START = (0xffffffff - CONFIG_ROM_SIZE + CONFIG_ROM_SECTION_OFFSET + 1) + option CONFIG_ROMBASE = (CONFIG_ROM_PAYLOAD_START + CONFIG_PAYLOAD_SIZE) -# option XIP_ROM_SIZE = FALLBACK_SIZE - option XIP_ROM_SIZE = 65536 +# option CONFIG_XIP_ROM_SIZE = CONFIG_FALLBACK_SIZE + option CONFIG_XIP_ROM_SIZE = 65536 - option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) + option CONFIG_XIP_ROM_BASE = (CONFIG_ROMBASE + CONFIG_ROM_IMAGE_SIZE - CONFIG_XIP_ROM_SIZE) payload /usr/src/filo-0.4.1_btext/filo.elf # payload /usr/src/filo-0.4.2/filo.elf @@ -148,20 +148,20 @@ end romimage "fallback" option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_SECTION_SIZE = FALLBACK_SIZE - option ROM_SECTION_OFFSET= (ROM_SIZE - FALLBACK_SIZE) + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_SECTION_SIZE = CONFIG_FALLBACK_SIZE + option CONFIG_ROM_SECTION_OFFSET= (CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE) - option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) - option CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - option _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) + option CONFIG_PAYLOAD_SIZE = (CONFIG_ROM_SECTION_SIZE - CONFIG_ROM_IMAGE_SIZE) + option CONFIG_ROM_PAYLOAD_START = (0xffffffff - CONFIG_ROM_SIZE + CONFIG_ROM_SECTION_OFFSET + 1) + option CONFIG_ROMBASE = (CONFIG_ROM_PAYLOAD_START + CONFIG_PAYLOAD_SIZE) -# option XIP_ROM_SIZE = FALLBACK_SIZE - option XIP_ROM_SIZE = 65536 - option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +# option CONFIG_XIP_ROM_SIZE = CONFIG_FALLBACK_SIZE + option CONFIG_XIP_ROM_SIZE = 65536 + option CONFIG_XIP_ROM_BASE = (CONFIG_ROMBASE + CONFIG_ROM_IMAGE_SIZE - CONFIG_XIP_ROM_SIZE) payload ../../../payloads/filo.elf # payload /usr/src/filo-0.4.2/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/iwill/dk8x/Config.lb b/targets/iwill/dk8x/Config.lb index bcb18b8998..ab4ff09c60 100644 --- a/targets/iwill/dk8x/Config.lb +++ b/targets/iwill/dk8x/Config.lb @@ -6,13 +6,13 @@ target dk8x mainboard iwill/dk8x -option HAVE_HARD_RESET=1 +option CONFIG_HAVE_HARD_RESET=1 -option HAVE_OPTION_TABLE=1 -option HAVE_MP_TABLE=1 -option ROM_SIZE=1024*1024 +option CONFIG_HAVE_OPTION_TABLE=1 +option CONFIG_HAVE_MP_TABLE=1 +option CONFIG_ROM_SIZE=1024*1024 -option HAVE_FALLBACK_BOOT=1 +option CONFIG_HAVE_FALLBACK_BOOT=1 #option CONFIG_LSI_SCSI_FW_FIXUP=1 @@ -21,8 +21,8 @@ option HAVE_FALLBACK_BOOT=1 ### ### Build code to export a programmable irq routing table ### -option HAVE_PIRQ_TABLE=1 -option IRQ_SLOT_COUNT=12 +option CONFIG_HAVE_PIRQ_TABLE=1 +option CONFIG_IRQ_SLOT_COUNT=12 # ### ### Build code for SMP support @@ -39,7 +39,7 @@ option CONFIG_MAX_PHYSICAL_CPUS=2 option CONFIG_IOAPIC=1 # ### -### MEMORY_HOLE instructs earlymtrr.inc to +### CONFIG_MEMORY_HOLE instructs earlymtrr.inc to ### enable caching from 0-640KB and to disable ### caching from 640KB-1MB using fixed MTRRs ### @@ -47,24 +47,24 @@ option CONFIG_IOAPIC=1 ### CPU identification depends on only variable MTRRs ### being enabled. ### -#option MEMORY_HOLE=0 +#option CONFIG_MEMORY_HOLE=0 # ### ### Clean up the motherboard id strings ### -option MAINBOARD_PART_NUMBER="DK8X" -option MAINBOARD_VENDOR="IWILL" +option CONFIG_MAINBOARD_PART_NUMBER="DK8X" +option CONFIG_MAINBOARD_VENDOR="IWILL" # ### ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -#option FALLBACK_SIZE=524288 -#option FALLBACK_SIZE=98304 -option FALLBACK_SIZE=131072 +#option CONFIG_FALLBACK_SIZE=524288 +#option CONFIG_FALLBACK_SIZE=98304 +option CONFIG_FALLBACK_SIZE=131072 -## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. -option ROM_IMAGE_SIZE=65536 +## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. +option CONFIG_ROM_IMAGE_SIZE=65536 ### @@ -77,7 +77,7 @@ option ROM_IMAGE_SIZE=65536 #option CONFIG_COMPRESS=1 option CONFIG_CONSOLE_SERIAL8250=1 -option TTYS0_BAUD=115200 +option CONFIG_TTYS0_BAUD=115200 ## ### Select the coreboot loglevel @@ -89,30 +89,30 @@ option TTYS0_BAUD=115200 ## WARNING 5 warning conditions ## NOTICE 6 normal but significant condition ## INFO 7 informational -## DEBUG 8 debug-level messages +## CONFIG_DEBUG 8 debug-level messages ## SPEW 9 Way too many details ## Request this level of debugging output -option DEFAULT_CONSOLE_LOGLEVEL=7 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 ## At a maximum only compile in this level of debugging -option MAXIMUM_CONSOLE_LOGLEVEL=7 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=7 -#option DEBUG=1 +#option CONFIG_DEBUG=1 # ## Coreboot C code runs at this location in RAM -option _RAMBASE=0x004000 +option CONFIG_RAMBASE=0x004000 ## ## Use a 32K stack ## -option STACK_SIZE=0x8000 +option CONFIG_STACK_SIZE=0x8000 ## ## Use a 56K heap ## -option HEAP_SIZE=0xe000 +option CONFIG_HEAP_SIZE=0xe000 # ### @@ -125,22 +125,22 @@ option CONFIG_ROM_PAYLOAD = 1 # romimage "normal" # 48K for SCSI FW -# option ROM_SIZE = 512*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-48*1024 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" - option USE_FALLBACK_IMAGE=0 - option ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - option ROM_SECTION_OFFSET= 0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_SECTION_SIZE = (CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE) + option CONFIG_ROM_SECTION_OFFSET= 0 - option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) - option CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - option _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) + option CONFIG_PAYLOAD_SIZE = (CONFIG_ROM_SECTION_SIZE - CONFIG_ROM_IMAGE_SIZE) + option CONFIG_ROM_PAYLOAD_START = (0xffffffff - CONFIG_ROM_SIZE + CONFIG_ROM_SECTION_OFFSET + 1) + option CONFIG_ROMBASE = (CONFIG_ROM_PAYLOAD_START + CONFIG_PAYLOAD_SIZE) -# option XIP_ROM_SIZE = FALLBACK_SIZE - option XIP_ROM_SIZE = 65536 +# option CONFIG_XIP_ROM_SIZE = CONFIG_FALLBACK_SIZE + option CONFIG_XIP_ROM_SIZE = 65536 - option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) + option CONFIG_XIP_ROM_BASE = (CONFIG_ROMBASE + CONFIG_ROM_IMAGE_SIZE - CONFIG_XIP_ROM_SIZE) payload /usr/src/filo-0.4.1_btext/filo.elf # payload /usr/src/filo-0.4.2/filo.elf @@ -148,20 +148,20 @@ end romimage "fallback" option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_SECTION_SIZE = FALLBACK_SIZE - option ROM_SECTION_OFFSET= (ROM_SIZE - FALLBACK_SIZE) + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_SECTION_SIZE = CONFIG_FALLBACK_SIZE + option CONFIG_ROM_SECTION_OFFSET= (CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE) - option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) - option CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - option _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) + option CONFIG_PAYLOAD_SIZE = (CONFIG_ROM_SECTION_SIZE - CONFIG_ROM_IMAGE_SIZE) + option CONFIG_ROM_PAYLOAD_START = (0xffffffff - CONFIG_ROM_SIZE + CONFIG_ROM_SECTION_OFFSET + 1) + option CONFIG_ROMBASE = (CONFIG_ROM_PAYLOAD_START + CONFIG_PAYLOAD_SIZE) -# option XIP_ROM_SIZE = FALLBACK_SIZE - option XIP_ROM_SIZE = 65536 - option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +# option CONFIG_XIP_ROM_SIZE = CONFIG_FALLBACK_SIZE + option CONFIG_XIP_ROM_SIZE = 65536 + option CONFIG_XIP_ROM_BASE = (CONFIG_ROMBASE + CONFIG_ROM_IMAGE_SIZE - CONFIG_XIP_ROM_SIZE) payload ../../../payloads/filo.elf # payload /usr/src/filo-0.4.2/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/jetway/j7f24/Config-abuild.lb b/targets/jetway/j7f24/Config-abuild.lb index d364cb7cbd..2a65acae0d 100644 --- a/targets/jetway/j7f24/Config-abuild.lb +++ b/targets/jetway/j7f24/Config-abuild.lb @@ -4,18 +4,18 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/jetway/j7f24/Config.lb b/targets/jetway/j7f24/Config.lb index 268873d07a..52a1108ee3 100644 --- a/targets/jetway/j7f24/Config.lb +++ b/targets/jetway/j7f24/Config.lb @@ -22,24 +22,24 @@ target jetway-j7f24 mainboard jetway/j7f24 -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 # coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 # # If space is allotted for a VGA BIOS, # generate the final ROM like this: # cat vgabios bochsbios coreboot.rom > coreboot.rom.final # -#option ROM_SIZE = (512 * 1024) - (63 * 1024) - (64 * 1024) -option ROM_SIZE = (512 * 1024) +#option CONFIG_ROM_SIZE = (512 * 1024) - (63 * 1024) - (64 * 1024) +option CONFIG_ROM_SIZE = (512 * 1024) romimage "image" option COREBOOT_EXTRA_VERSION = "-j7f24" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" diff --git a/targets/kontron/986lcd-m/Config-abuild.lb b/targets/kontron/986lcd-m/Config-abuild.lb index c5bb2c0d28..ac903d16e9 100644 --- a/targets/kontron/986lcd-m/Config-abuild.lb +++ b/targets/kontron/986lcd-m/Config-abuild.lb @@ -4,26 +4,26 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=1024*1024 +option CONFIG_ROM_SIZE=1024*1024 romimage "normal" - option USE_FALLBACK_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" #pci_rom ../../../misc/kontron-pci8086,27a2.rom vendor_id=0x8086 device_id=0x27a2 diff --git a/targets/kontron/986lcd-m/Config.lb b/targets/kontron/986lcd-m/Config.lb index 8d1a1fd5a8..08f2836bf9 100644 --- a/targets/kontron/986lcd-m/Config.lb +++ b/targets/kontron/986lcd-m/Config.lb @@ -1,16 +1,16 @@ target kontron_986lcd_m mainboard kontron/986lcd-m -## ROM_SIZE is the total number of bytes allocated for coreboot use +## CONFIG_ROM_SIZE is the total number of bytes allocated for coreboot use ## (normal AND fallback images and payloads). -option ROM_SIZE = 1024 * 1024 +option CONFIG_ROM_SIZE = 1024 * 1024 romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" # Uncomment this and fix the path to your VGA BIOS blob (~/amipci_01.20 here) for on-board VGA support. # See http://www.coreboot.org/Kontron_986LCD-M_mITX for details. diff --git a/targets/lippert/frontrunner/Config.lb b/targets/lippert/frontrunner/Config.lb index e2162685cf..cee55cdd55 100644 --- a/targets/lippert/frontrunner/Config.lb +++ b/targets/lippert/frontrunner/Config.lb @@ -4,11 +4,11 @@ target frontrunner mainboard lippert/frontrunner -option ROM_SIZE=256*1024 +option CONFIG_ROM_SIZE=256*1024 romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x16000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x16000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -19,8 +19,8 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x16000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x16000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -30,4 +30,4 @@ romimage "fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/lippert/roadrunner-lx/Config.lb b/targets/lippert/roadrunner-lx/Config.lb index 0d01da8652..130849c746 100644 --- a/targets/lippert/roadrunner-lx/Config.lb +++ b/targets/lippert/roadrunner-lx/Config.lb @@ -35,28 +35,28 @@ option CONFIG_COMPRESSED_PAYLOAD_LZMA = 0 #option CONFIG_IDE = 1 #option CONFIG_FS_PAYLOAD = 1 #option CONFIG_FS_EXT2 = 1 -#option AUTOBOOT_DELAY = 0 -#option AUTOBOOT_CMDLINE = "hda1:/payload.elf" +#option CONFIG_AUTOBOOT_DELAY = 0 +#option CONFIG_AUTOBOOT_CMDLINE = "hda1:/payload.elf" # Leave 36k for VSA. Usually board is equipped with a 512 KB FWH (LPC) flash, # however it can be replaced with a 1 MB chip. -option ROM_SIZE = (512 * 1024) - (36 * 1024) -#option ROM_SIZE = (1024 * 1024) - (36 * 1024) -option FALLBACK_SIZE = ROM_SIZE +option CONFIG_ROM_SIZE = (512 * 1024) - (36 * 1024) +#option CONFIG_ROM_SIZE = (1024 * 1024) - (36 * 1024) +option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE -#option DEFAULT_CONSOLE_LOGLEVEL = 4 -#option MAXIMUM_CONSOLE_LOGLEVEL = 4 +#option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 4 +#option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 4 -# Saves space on ROM_IMAGE_SIZE, but decompression costs a second on boot. +# Saves space on CONFIG_ROM_IMAGE_SIZE, but decompression costs a second on boot. option CONFIG_COMPRESS = 1 romimage "image" - option USE_FALLBACK_IMAGE = 1 - option ROM_IMAGE_SIZE = 64 * 1024 + option CONFIG_USE_FALLBACK_IMAGE = 1 + option CONFIG_ROM_IMAGE_SIZE = 64 * 1024 option COREBOOT_EXTRA_VERSION = ".0" payload ../payload.elf # If getting payload from IDE # payload /dev/null end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" diff --git a/targets/lippert/spacerunner-lx/Config.lb b/targets/lippert/spacerunner-lx/Config.lb index a29202d8fa..d7b1d7916f 100644 --- a/targets/lippert/spacerunner-lx/Config.lb +++ b/targets/lippert/spacerunner-lx/Config.lb @@ -36,27 +36,27 @@ option CONFIG_COMPRESSED_PAYLOAD_LZMA = 0 #option CONFIG_IDE = 1 #option CONFIG_FS_PAYLOAD = 1 #option CONFIG_FS_EXT2 = 1 -#option AUTOBOOT_DELAY = 0 -#option AUTOBOOT_CMDLINE = "hda1:/payload.elf" +#option CONFIG_AUTOBOOT_DELAY = 0 +#option CONFIG_AUTOBOOT_CMDLINE = "hda1:/payload.elf" # Leave 36k for VSA. Board is equipped with a 1 MB SPI flash, however, due to # limitations of the IT8712F Super I/O, only the top 512 KB are directly mapped. -option ROM_SIZE = (512 * 1024) - (36 * 1024) -option FALLBACK_SIZE = ROM_SIZE +option CONFIG_ROM_SIZE = (512 * 1024) - (36 * 1024) +option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE -#option DEFAULT_CONSOLE_LOGLEVEL = 4 -#option MAXIMUM_CONSOLE_LOGLEVEL = 4 +#option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 4 +#option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 4 -# Saves space on ROM_IMAGE_SIZE, but decompression costs a second on boot. +# Saves space on CONFIG_ROM_IMAGE_SIZE, but decompression costs a second on boot. option CONFIG_COMPRESS = 1 romimage "image" - option USE_FALLBACK_IMAGE = 1 - option ROM_IMAGE_SIZE = 64 * 1024 + option CONFIG_USE_FALLBACK_IMAGE = 1 + option CONFIG_ROM_IMAGE_SIZE = 64 * 1024 option COREBOOT_EXTRA_VERSION = ".0" payload ../payload.elf # If getting payload from IDE # payload /dev/null end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" diff --git a/targets/momentum/apache/Config.lb b/targets/momentum/apache/Config.lb index f3d3d6da3d..5d0fd32484 100644 --- a/targets/momentum/apache/Config.lb +++ b/targets/momentum/apache/Config.lb @@ -8,21 +8,21 @@ mainboard momentum/apache # Apache Demo Board romimage "normal" ## Base of ROM - option _ROMBASE=0xfff00000 + option CONFIG_ROMBASE=0xfff00000 ## Apache reset vector - option _RESET=_ROMBASE+0x100 + option CONFIG_RESET=CONFIG_ROMBASE+0x100 ## Exception vectors (other than reset vector) - option _EXCEPTION_VECTORS=_RESET+0x100 + option CONFIG_EXCEPTION_VECTORS=CONFIG_RESET+0x100 ## Start of coreboot in the boot rom - ## = _RESET + exeception vector table size - option _ROMSTART=_RESET+0x3100 + ## = CONFIG_RESET + exeception vector table size + option CONFIG_ROMSTART=CONFIG_RESET+0x3100 ## Coreboot C code runs at this location in RAM - option _RAMBASE=0x00100000 - option _RAMSTART=0x00100000 + option CONFIG_RAMBASE=0x00100000 + option CONFIG_RAMSTART=0x00100000 end -buildrom ./coreboot.rom ROM_SIZE "normal" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" diff --git a/targets/motorola/sandpoint/Config.lb b/targets/motorola/sandpoint/Config.lb index d70562328f..7ef1668969 100644 --- a/targets/motorola/sandpoint/Config.lb +++ b/targets/motorola/sandpoint/Config.lb @@ -9,23 +9,23 @@ mainboard motorola/sandpointx3_altimus_mpc7410 # Sandpoint Demo Board romimage "normal" ## Base of ROM - option _ROMBASE=0xfff00000 + option CONFIG_ROMBASE=0xfff00000 ## Sandpoint reset vector - option _RESET=_ROMBASE+0x100 + option CONFIG_RESET=CONFIG_ROMBASE+0x100 ## Exception vectors (other than reset vector) - option _EXCEPTION_VECTORS=_RESET+0x100 + option CONFIG_EXCEPTION_VECTORS=CONFIG_RESET+0x100 ## Start of coreboot in the boot rom - ## = _RESET + exeception vector table size - option _ROMSTART=_RESET+0x3100 + ## = CONFIG_RESET + exeception vector table size + option CONFIG_ROMSTART=CONFIG_RESET+0x3100 ## Coreboot C code runs at this location in RAM - option _RAMBASE=0x00100000 - option _RAMSTART=0x00100000 + option CONFIG_RAMBASE=0x00100000 + option CONFIG_RAMSTART=0x00100000 option CONFIG_SANDPOINT_ALTIMUS=1 end -buildrom ./coreboot.rom ROM_SIZE "normal" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" diff --git a/targets/motorola/sandpoint/Config.lb.ide_stream b/targets/motorola/sandpoint/Config.lb.ide_stream index 04b2591584..6649c092ae 100644 --- a/targets/motorola/sandpoint/Config.lb.ide_stream +++ b/targets/motorola/sandpoint/Config.lb.ide_stream @@ -6,32 +6,32 @@ loadoptions target sandpoint -uses CROSS_COMPILE -uses HAVE_OPTION_TABLE +uses CONFIG_CROSS_COMPILE +uses CONFIG_HAVE_OPTION_TABLE uses CONFIG_SANDPOINT_ALTIMUS uses CONFIG_COMPRESS -uses DEFAULT_CONSOLE_LOGLEVEL +uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_USE_INIT uses CONFIG_CHIP_CONFIGURE -uses NO_POST +uses CONFIG_NO_POST uses CONFIG_CONSOLE_SERIAL8250 -uses TTYS0_BASE +uses CONFIG_TTYS0_BASE uses CONFIG_IDE_PAYLOAD -uses IDE_BOOT_DRIVE -uses IDE_SWAB IDE_OFFSET -uses ROM_SIZE -uses _RESET -uses _EXCEPTION_VECTORS -uses _ROMBASE -uses _ROMSTART -uses _RAMBASE -uses _RAMSTART -uses STACK_SIZE -uses HEAP_SIZE +uses CONFIG_IDE_BOOT_DRIVE +uses CONFIG_IDE_SWAB CONFIG_IDE_OFFSET +uses CONFIG_ROM_SIZE +uses CONFIG_RESET +uses CONFIG_EXCEPTION_VECTORS +uses CONFIG_ROMBASE +uses CONFIG_ROMSTART +uses CONFIG_RAMBASE +uses CONFIG_RAMSTART +uses CONFIG_STACK_SIZE +uses CONFIG_HEAP_SIZE ## use a cross compiler -#option CROSS_COMPILE="powerpc-eabi-" -#option CROSS_COMPILE="ppc_74xx-" +#option CONFIG_CROSS_COMPILE="powerpc-eabi-" +#option CONFIG_CROSS_COMPILE="ppc_74xx-" ## Use stage 1 initialization code option CONFIG_USE_INIT=1 @@ -43,48 +43,48 @@ option CONFIG_CHIP_CONFIGURE=1 option CONFIG_COMPRESS=0 ## Turn off POST codes -option NO_POST=1 +option CONFIG_NO_POST=1 ## Enable serial console -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 -option TTYS0_BASE=0x3f8 +option CONFIG_TTYS0_BASE=0x3f8 ## Boot linux from IDE option CONFIG_IDE_PAYLOAD=1 -option IDE_BOOT_DRIVE=0 -option IDE_SWAB=1 -option IDE_OFFSET=0 +option CONFIG_IDE_BOOT_DRIVE=0 +option CONFIG_IDE_SWAB=1 +option CONFIG_IDE_OFFSET=0 # ROM is 1Mb -option ROM_SIZE=1024*1024 +option CONFIG_ROM_SIZE=1024*1024 # Set stack and heap sizes (stage 2) -option STACK_SIZE=0x10000 -option HEAP_SIZE=0x10000 +option CONFIG_STACK_SIZE=0x10000 +option CONFIG_HEAP_SIZE=0x10000 # Sandpoint Demo Board romimage "normal" ## Base of ROM - option _ROMBASE=0xfff00000 + option CONFIG_ROMBASE=0xfff00000 ## Sandpoint reset vector - option _RESET=_ROMBASE+0x100 + option CONFIG_RESET=CONFIG_ROMBASE+0x100 ## Exception vectors (other than reset vector) - option _EXCEPTION_VECTORS=_RESET+0x100 + option CONFIG_EXCEPTION_VECTORS=CONFIG_RESET+0x100 ## Start of coreboot in the boot rom - ## = _RESET + exeception vector table size - option _ROMSTART=_RESET+0x3100 + ## = CONFIG_RESET + exeception vector table size + option CONFIG_ROMSTART=CONFIG_RESET+0x3100 ## Coreboot C code runs at this location in RAM - option _RAMBASE=0x00100000 - option _RAMSTART=0x00100000 + option CONFIG_RAMBASE=0x00100000 + option CONFIG_RAMSTART=0x00100000 option CONFIG_SANDPOINT_ALTIMUS=1 mainboard motorola/sandpoint end -buildrom ./coreboot.rom ROM_SIZE "normal" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" diff --git a/targets/msi/ms6119/Config.lb b/targets/msi/ms6119/Config.lb index 5f05bca879..271b7f0483 100644 --- a/targets/msi/ms6119/Config.lb +++ b/targets/msi/ms6119/Config.lb @@ -21,29 +21,29 @@ target ms6119 mainboard msi/ms6119 -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "MSI" -option MAINBOARD_PART_NUMBER = "MS-6119" +option CONFIG_MAINBOARD_VENDOR = "MSI" +option CONFIG_MAINBOARD_PART_NUMBER = "MS-6119" -option IRQ_SLOT_COUNT = 7 +option CONFIG_IRQ_SLOT_COUNT = 7 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/msi/ms6147/Config.lb b/targets/msi/ms6147/Config.lb index b639587ee6..02a603557f 100644 --- a/targets/msi/ms6147/Config.lb +++ b/targets/msi/ms6147/Config.lb @@ -21,29 +21,29 @@ target ms6147 mainboard msi/ms6147 -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "MSI" -option MAINBOARD_PART_NUMBER = "MS-6147" +option CONFIG_MAINBOARD_VENDOR = "MSI" +option CONFIG_MAINBOARD_PART_NUMBER = "MS-6147" -option IRQ_SLOT_COUNT = 8 +option CONFIG_IRQ_SLOT_COUNT = 8 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".Normal" payload ../payload.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".Fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/msi/ms6178/Config.lb b/targets/msi/ms6178/Config.lb index 1276c88a77..d302f85998 100644 --- a/targets/msi/ms6178/Config.lb +++ b/targets/msi/ms6178/Config.lb @@ -21,32 +21,32 @@ target ms6178 mainboard msi/ms6178 -option ROM_SIZE = 512 * 1024 +option CONFIG_ROM_SIZE = 512 * 1024 -option MAINBOARD_VENDOR = "MSI" -option MAINBOARD_PART_NUMBER = "MS-6178" +option CONFIG_MAINBOARD_VENDOR = "MSI" +option CONFIG_MAINBOARD_PART_NUMBER = "MS-6178" -option IRQ_SLOT_COUNT = 4 +option CONFIG_IRQ_SLOT_COUNT = 4 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" # pci_rom i810.vga vendor_id=0x8086 device_id=0x7120 diff --git a/targets/msi/ms7135/Config-abuild.lb b/targets/msi/ms7135/Config-abuild.lb index 88dd1684e3..b1c927705b 100644 --- a/targets/msi/ms7135/Config-abuild.lb +++ b/targets/msi/ms7135/Config-abuild.lb @@ -4,33 +4,33 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/msi/ms7135/Config.lb b/targets/msi/ms7135/Config.lb index e56fbff2e0..2d8ea4928a 100644 --- a/targets/msi/ms7135/Config.lb +++ b/targets/msi/ms7135/Config.lb @@ -23,39 +23,39 @@ target ms7135 mainboard msi/ms7135 -option DEFAULT_CONSOLE_LOGLEVEL=8 -option MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 -option HAVE_PIRQ_TABLE=1 +option CONFIG_HAVE_PIRQ_TABLE=1 option CONFIG_CONSOLE_VGA=1 option CONFIG_PCI_ROM_RUN=1 romimage "normal" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="_Normal" payload /tmp/payload.elf end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="_Fallback" payload /tmp/payload.elf end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="_Failover" end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/msi/ms7260/Config-abuild.lb b/targets/msi/ms7260/Config-abuild.lb index a03aba0f40..f30a9b367e 100644 --- a/targets/msi/ms7260/Config-abuild.lb +++ b/targets/msi/ms7260/Config-abuild.lb @@ -22,37 +22,37 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FAILOVER_IMAGE = 0 - option USE_FALLBACK_IMAGE = 0 - option ROM_IMAGE_SIZE = 128 * 1024 - option XIP_ROM_SIZE = 256 * 1024 + option CONFIG_USE_FAILOVER_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 + option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 + option CONFIG_XIP_ROM_SIZE = 256 * 1024 option COREBOOT_EXTRA_VERSION = ".0Normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FAILOVER_IMAGE = 0 - option USE_FALLBACK_IMAGE = 1 - option ROM_IMAGE_SIZE = 128 * 1024 - option XIP_ROM_SIZE = 256 * 1024 + option CONFIG_USE_FAILOVER_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 1 + option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 + option CONFIG_XIP_ROM_SIZE = 256 * 1024 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload __PAYLOAD__ end romimage "failover" - option USE_FAILOVER_IMAGE = 1 - option USE_FALLBACK_IMAGE = 0 - option ROM_IMAGE_SIZE = FAILOVER_SIZE - option XIP_ROM_SIZE = FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 0 + option CONFIG_ROM_IMAGE_SIZE = CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE = CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION = ".0Failover" end -# buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +# buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/msi/ms7260/Config.lb b/targets/msi/ms7260/Config.lb index 1ef5be266b..04a33ff68b 100644 --- a/targets/msi/ms7260/Config.lb +++ b/targets/msi/ms7260/Config.lb @@ -21,38 +21,38 @@ target ms7260 mainboard msi/ms7260 -option ROM_SIZE = 512 * 1024 +option CONFIG_ROM_SIZE = 512 * 1024 option CONFIG_COMPRESSED_PAYLOAD_NRV2B = 1 # NRV2B compression # option CONFIG_COMPRESSED_PAYLOAD_LZMA = 1 # LZMA compression romimage "normal" - option USE_FAILOVER_IMAGE = 0 - option USE_FALLBACK_IMAGE = 0 - option ROM_IMAGE_SIZE = 128 * 1024 - option XIP_ROM_SIZE = 256 * 1024 + option CONFIG_USE_FAILOVER_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 + option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 + option CONFIG_XIP_ROM_SIZE = 256 * 1024 option COREBOOT_EXTRA_VERSION = ".0Normal" # payload /tmp/filo.elf payload ../payload.elf end romimage "fallback" - option USE_FAILOVER_IMAGE = 0 - option USE_FALLBACK_IMAGE = 1 - option ROM_IMAGE_SIZE = 128 * 1024 - option XIP_ROM_SIZE = 256 * 1024 + option CONFIG_USE_FAILOVER_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 1 + option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 + option CONFIG_XIP_ROM_SIZE = 256 * 1024 option COREBOOT_EXTRA_VERSION = ".0Fallback" # payload /tmp/filo.elf payload ../payload.elf end romimage "failover" - option USE_FAILOVER_IMAGE = 1 - option USE_FALLBACK_IMAGE = 0 - option ROM_IMAGE_SIZE = FAILOVER_SIZE - option XIP_ROM_SIZE = FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 0 + option CONFIG_ROM_IMAGE_SIZE = CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE = CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION = ".0Failover" end -# buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +# buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/msi/ms9185/Config-abuild.lb b/targets/msi/ms9185/Config-abuild.lb index b136df4768..3baa41a42a 100644 --- a/targets/msi/ms9185/Config-abuild.lb +++ b/targets/msi/ms9185/Config-abuild.lb @@ -4,23 +4,23 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE = 128 * 1024 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE = 128 * 1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/msi/ms9185/Config.lb b/targets/msi/ms9185/Config.lb index e77a42c6bd..a7cf3f135f 100644 --- a/targets/msi/ms9185/Config.lb +++ b/targets/msi/ms9185/Config.lb @@ -29,17 +29,17 @@ mainboard msi/ms9185 # ms9185 romimage "normal" # 36k for ATI option rom - option ROM_SIZE = 512*1024-36*1024 -# option ROM_SIZE = 524288 -# option ROM_SIZE = 425984 + option CONFIG_ROM_SIZE = 512*1024-36*1024 +# option CONFIG_ROM_SIZE = 524288 +# option CONFIG_ROM_SIZE = 425984 # 64K for Etherboot -# option ROM_SIZE = 458752 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x18800 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 +# option CONFIG_ROM_SIZE = 458752 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x18800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -62,12 +62,12 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x19800 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x19800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -91,4 +91,4 @@ romimage "fallback" # payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_com2.zelf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/msi/ms9282/Config-abuild.lb b/targets/msi/ms9282/Config-abuild.lb index b136df4768..3baa41a42a 100644 --- a/targets/msi/ms9282/Config-abuild.lb +++ b/targets/msi/ms9282/Config-abuild.lb @@ -4,23 +4,23 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE = 128 * 1024 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE = 128 * 1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/msi/ms9282/Config.lb b/targets/msi/ms9282/Config.lb index 0e78424a48..0f3c87ed32 100644 --- a/targets/msi/ms9282/Config.lb +++ b/targets/msi/ms9282/Config.lb @@ -24,19 +24,19 @@ mainboard msi/ms9282 romimage "normal" # 48K for SCSI FW -# option ROM_SIZE = 475136 - option ROM_SIZE = 512*1024-36*1024 -# option ROM_SIZE = 524288 +# option CONFIG_ROM_SIZE = 475136 + option CONFIG_ROM_SIZE = 512*1024-36*1024 +# option CONFIG_ROM_SIZE = 524288 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 425984 +# option CONFIG_ROM_SIZE = 425984 # 64K for Etherboot -# option ROM_SIZE = 458752 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x18800 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 +# option CONFIG_ROM_SIZE = 458752 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x18800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -59,12 +59,12 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x19800 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x19800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -88,4 +88,4 @@ romimage "fallback" # payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_com2.zelf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/nec/powermate2000/Config.lb b/targets/nec/powermate2000/Config.lb index dbb40ebc0d..72e29cc9a1 100644 --- a/targets/nec/powermate2000/Config.lb +++ b/targets/nec/powermate2000/Config.lb @@ -21,29 +21,29 @@ target powermate2000 mainboard nec/powermate2000 -option ROM_SIZE = 512 * 1024 +option CONFIG_ROM_SIZE = 512 * 1024 -option MAINBOARD_VENDOR = "NEC" -option MAINBOARD_PART_NUMBER = "PowerMate 2000" +option CONFIG_MAINBOARD_VENDOR = "NEC" +option CONFIG_MAINBOARD_PART_NUMBER = "PowerMate 2000" -option IRQ_SLOT_COUNT = 5 +option CONFIG_IRQ_SLOT_COUNT = 5 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload ../payload.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/newisys/khepri/Config.lb b/targets/newisys/khepri/Config.lb index 04bea9b890..d624b9c46b 100644 --- a/targets/newisys/khepri/Config.lb +++ b/targets/newisys/khepri/Config.lb @@ -12,34 +12,34 @@ option CC="gcc -m32" # Configuration options. -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 # Size of the image. Khepri comes with 512k per default. -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 -option HAVE_OPTION_TABLE=1 +option CONFIG_HAVE_OPTION_TABLE=1 option CONFIG_ROM_PAYLOAD=1 -option HAVE_FALLBACK_BOOT=1 +option CONFIG_HAVE_FALLBACK_BOOT=1 -option FALLBACK_SIZE=131072 +option CONFIG_FALLBACK_SIZE=131072 ## Coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="-Khepri-Normal" payload ../../../payloads/tg3--ide_disk.zelf end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="-Khepri-Fallback" payload ../../../payloads/tg3--ide_disk.zelf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/nvidia/l1_2pvv/Config-abuild.lb b/targets/nvidia/l1_2pvv/Config-abuild.lb index 88dd1684e3..b1c927705b 100644 --- a/targets/nvidia/l1_2pvv/Config-abuild.lb +++ b/targets/nvidia/l1_2pvv/Config-abuild.lb @@ -4,33 +4,33 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/nvidia/l1_2pvv/Config.lb b/targets/nvidia/l1_2pvv/Config.lb index c6d546ed83..87171a7449 100644 --- a/targets/nvidia/l1_2pvv/Config.lb +++ b/targets/nvidia/l1_2pvv/Config.lb @@ -29,20 +29,20 @@ mainboard nvidia/l1_2pvv # serengeti_leopard romimage "normal" # 48K for SCSI FW -# option ROM_SIZE = 475136 +# option CONFIG_ROM_SIZE = 475136 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 425984 +# option CONFIG_ROM_SIZE = 425984 # 64K for Etherboot -# option ROM_SIZE = 458752 +# option CONFIG_ROM_SIZE = 458752 # 44k for atixx.rom -# option ROM_SIZE = 479232 - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x18800 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 +# option CONFIG_ROM_SIZE = 479232 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x18800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -64,13 +64,13 @@ romimage "normal" end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x19800 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x19800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -97,12 +97,12 @@ romimage "fallback" end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/nvidia/l1_2pvv/Config.lb.kernel b/targets/nvidia/l1_2pvv/Config.lb.kernel index a0a16cf53e..70e95e4230 100644 --- a/targets/nvidia/l1_2pvv/Config.lb.kernel +++ b/targets/nvidia/l1_2pvv/Config.lb.kernel @@ -26,19 +26,19 @@ target l1_2pvv mainboard nvidia/l1_2pvv -option ROM_SIZE=0x200000 -option FALLBACK_SIZE=(ROM_SIZE-0x1000) +option CONFIG_ROM_SIZE=0x200000 +option CONFIG_FALLBACK_SIZE=(CONFIG_ROM_SIZE-0x1000) romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=1 -# option ROM_IMAGE_SIZE=0x19800 - option ROM_IMAGE_SIZE=0x17000 -# option ROM_IMAGE_SIZE=0x15800 -# option ROM_IMAGE_SIZE=0x13800 - option XIP_ROM_SIZE=0x40000 +# option CONFIG_ROM_IMAGE_SIZE=0x19800 + option CONFIG_ROM_IMAGE_SIZE=0x17000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -67,13 +67,13 @@ romimage "fallback" end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" "failover" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/olpc/btest/Config.lb b/targets/olpc/btest/Config.lb index 3789519f91..df9d0fec91 100644 --- a/targets/olpc/btest/Config.lb +++ b/targets/olpc/btest/Config.lb @@ -9,16 +9,16 @@ mainboard olpc/btest #option CONFIG_PRECOMPRESSED_PAYLOAD=0 # leave 64k for vsa and 64k for EC code -option ROM_SIZE=(1024*1024)-(64*1024)-(64*1024) -option FALLBACK_SIZE=ROM_SIZE +option CONFIG_ROM_SIZE=(1024*1024)-(64*1024)-(64*1024) +option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE -option DEFAULT_CONSOLE_LOGLEVEL = 3 -option MAXIMUM_CONSOLE_LOGLEVEL = 3 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 3 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 3 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=32*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=32*1024 option COREBOOT_EXTRA_VERSION=".0Fallback" payload /tmp/olpcpayload.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/olpc/rev_a/Config.1M.lb b/targets/olpc/rev_a/Config.1M.lb index cacc9a030f..bd7d4bb1ef 100644 --- a/targets/olpc/rev_a/Config.1M.lb +++ b/targets/olpc/rev_a/Config.1M.lb @@ -8,16 +8,16 @@ mainboard olpc/rev_a #option CONFIG_PRECOMPRESSED_PAYLOAD=1 # leave 64k for vsa -option ROM_SIZE=(1024*1024)-(64*1024) -option FALLBACK_SIZE=ROM_SIZE +option CONFIG_ROM_SIZE=(1024*1024)-(64*1024) +option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=32*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=32*1024 option COREBOOT_EXTRA_VERSION=".0Fallback" payload /tmp/olpcpayload.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/olpc/rev_a/Config.SPI.lb b/targets/olpc/rev_a/Config.SPI.lb index fa3593a8e6..70e45223cd 100644 --- a/targets/olpc/rev_a/Config.SPI.lb +++ b/targets/olpc/rev_a/Config.SPI.lb @@ -9,16 +9,16 @@ mainboard olpc/rev_a #option CONFIG_PRECOMPRESSED_PAYLOAD=0 # leave 64k for vsa and 64k for EC code -option ROM_SIZE=(1024*1024)-(64*1024)-(64*1024) -option FALLBACK_SIZE=ROM_SIZE +option CONFIG_ROM_SIZE=(1024*1024)-(64*1024)-(64*1024) +option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=32*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=32*1024 option COREBOOT_EXTRA_VERSION=".0Fallback" payload /tmp/olpcpayload.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/olpc/rev_a/Config.kernel.lb b/targets/olpc/rev_a/Config.kernel.lb index ed612f7e90..15b5a6f32c 100644 --- a/targets/olpc/rev_a/Config.kernel.lb +++ b/targets/olpc/rev_a/Config.kernel.lb @@ -3,12 +3,12 @@ target rev_a mainboard olpc/rev_a -option ROM_SIZE=7*128*1024 -option FALLBACK_SIZE=ROM_SIZE +option CONFIG_ROM_SIZE=7*128*1024 +option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE #romimage "normal" -# option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x10000 +# option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x10000 # option COREBOOT_EXTRA_VERSION=".0Normal" ## payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf ## payload ../../../../tg3--ide_disk.zelf @@ -19,8 +19,8 @@ option FALLBACK_SIZE=ROM_SIZE #end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -31,5 +31,5 @@ romimage "fallback" payload /tmp/olpc end -buildrom ./coreboot.rom ROM_SIZE "fallback" -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/olpc/rev_a/Config.lb b/targets/olpc/rev_a/Config.lb index b570c66bcc..28258770a1 100644 --- a/targets/olpc/rev_a/Config.lb +++ b/targets/olpc/rev_a/Config.lb @@ -5,16 +5,16 @@ mainboard olpc/rev_a # leave 64k for vsa option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0 -option ROM_SIZE=512*1024-64*1024 -option FALLBACK_SIZE=ROM_SIZE +option CONFIG_ROM_SIZE=512*1024-64*1024 +option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=32*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=32*1024 option COREBOOT_EXTRA_VERSION=".0Fallback" payload /tmp/olpcpayload.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/pcengines/alix1c/Config.lb b/targets/pcengines/alix1c/Config.lb index 82415e0269..2c7a376f3a 100644 --- a/targets/pcengines/alix1c/Config.lb +++ b/targets/pcengines/alix1c/Config.lb @@ -3,23 +3,23 @@ mainboard pcengines/alix1c option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0 -## ROM_SIZE is the total number of bytes allocated for coreboot use +## CONFIG_ROM_SIZE is the total number of bytes allocated for coreboot use ## (normal AND fallback images and payloads). Leave 36k for VSA. -option ROM_SIZE = (512 * 1024) - (36 * 1024) +option CONFIG_ROM_SIZE = (512 * 1024) - (36 * 1024) -## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, +## CONFIG_ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, ## not including any payload. -option ROM_IMAGE_SIZE = (64 * 1024) +option CONFIG_ROM_IMAGE_SIZE = (64 * 1024) -option FALLBACK_SIZE = ROM_SIZE +option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE -option DEFAULT_CONSOLE_LOGLEVEL = 3 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 3 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/rca/rm4100/Config-abuild.lb b/targets/rca/rm4100/Config-abuild.lb index 8162eca6be..d7c1ec2c18 100644 --- a/targets/rca/rm4100/Config-abuild.lb +++ b/targets/rca/rm4100/Config-abuild.lb @@ -22,16 +22,16 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/rca/rm4100/Config.lb b/targets/rca/rm4100/Config.lb index 7df9899f3c..7d17739a00 100644 --- a/targets/rca/rm4100/Config.lb +++ b/targets/rca/rm4100/Config.lb @@ -25,9 +25,9 @@ mainboard rca/rm4100 ## Total number of bytes allocated for coreboot use ## (fallback images and payloads). ## -# option ROM_SIZE = 1024 * 1024 +# option CONFIG_ROM_SIZE = 1024 * 1024 ## For VGA BIOS (-64k) -option ROM_SIZE = (1024 * 1024) - (64 * 1024) +option CONFIG_ROM_SIZE = (1024 * 1024) - (64 * 1024) ## ## VGA Console @@ -51,14 +51,14 @@ option CONFIG_VIDEO_MB = 8 ## ## Request this level of debugging output ## -option DEFAULT_CONSOLE_LOGLEVEL = 7 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7 romimage "fallback" - option USE_FALLBACK_IMAGE = 1 - option FALLBACK_SIZE = ROM_SIZE + option CONFIG_USE_FALLBACK_IMAGE = 1 + option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE option COREBOOT_EXTRA_VERSION = "_RM4100" payload /tmp/filo.elf # payload /tmp/eb-5.4.3-eepro100.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/soyo/sy-6ba-plus-iii/Config.lb b/targets/soyo/sy-6ba-plus-iii/Config.lb index 05e9be4698..98bd66666e 100644 --- a/targets/soyo/sy-6ba-plus-iii/Config.lb +++ b/targets/soyo/sy-6ba-plus-iii/Config.lb @@ -21,31 +21,31 @@ target sy-6ba-plus-iii mainboard soyo/sy-6ba-plus-iii -option ROM_SIZE = 256 * 1024 -# option FALLBACK_SIZE = ROM_SIZE +option CONFIG_ROM_SIZE = 256 * 1024 +# option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE -option MAINBOARD_VENDOR = "Soyo" -option MAINBOARD_PART_NUMBER = "SY-6BA+ III" +option CONFIG_MAINBOARD_VENDOR = "Soyo" +option CONFIG_MAINBOARD_PART_NUMBER = "SY-6BA+ III" -option IRQ_SLOT_COUNT = 7 +option CONFIG_IRQ_SLOT_COUNT = 7 -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload ../payload.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload ../payload.elf end -# buildrom ./coreboot.rom ROM_SIZE "fallback" -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +# buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/sunw/ultra40/Config.lb b/targets/sunw/ultra40/Config.lb index 4761b3e037..cbd7f9698e 100644 --- a/targets/sunw/ultra40/Config.lb +++ b/targets/sunw/ultra40/Config.lb @@ -5,24 +5,24 @@ target ultra40 mainboard sunw/ultra40 -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 # sunw ultra40 romimage "normal" # 48K for SCSI FW -# option ROM_SIZE = 512*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-48*1024 # 64K for Etherboot -# option ROM_SIZE = 512*1024-64*1024 +# option CONFIG_ROM_SIZE = 512*1024-64*1024 # 64K for NIC option 48K for Raid option rom -# option ROM_SIZE = 512*1024-64*1024-48*1024 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x15000 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x17800 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 512*1024-64*1024-48*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x15000 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -45,13 +45,13 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x15000 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x17800 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x15000 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -70,4 +70,4 @@ romimage "fallback" # payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/supermicro/h8dme/Config-abuild.lb b/targets/supermicro/h8dme/Config-abuild.lb index 9720675b80..7e93e76234 100644 --- a/targets/supermicro/h8dme/Config-abuild.lb +++ b/targets/supermicro/h8dme/Config-abuild.lb @@ -4,34 +4,34 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION=".0-failover" end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/supermicro/h8dme/Config-lab.lb b/targets/supermicro/h8dme/Config-lab.lb index cb00452669..4f81981b3d 100644 --- a/targets/supermicro/h8dme/Config-lab.lb +++ b/targets/supermicro/h8dme/Config-lab.lb @@ -19,27 +19,27 @@ target h8dmre mainboard supermicro/h8dme -option ROM_SIZE=0x100000 +option CONFIG_ROM_SIZE=0x100000 # 44K for ATI ROM in 1M; 4K for failover -option FALLBACK_SIZE=(ROM_SIZE-0xC000) +option CONFIG_FALLBACK_SIZE=(CONFIG_ROM_SIZE-0xC000) romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=1 - option ROM_IMAGE_SIZE=0x18000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_ROM_IMAGE_SIZE=0x18000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" payload ../payload.elf.lzma end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" "failover" diff --git a/targets/supermicro/h8dme/Config.lb b/targets/supermicro/h8dme/Config.lb index de68f38fb7..559371e078 100644 --- a/targets/supermicro/h8dme/Config.lb +++ b/targets/supermicro/h8dme/Config.lb @@ -20,29 +20,29 @@ target h8dme mainboard supermicro/h8dme romimage "normal" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" payload ../payload.elf end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" payload ../payload.elf end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/supermicro/h8dme/Config.lb.kernel b/targets/supermicro/h8dme/Config.lb.kernel index d50f9ed2b0..bf09ee5c68 100644 --- a/targets/supermicro/h8dme/Config.lb.kernel +++ b/targets/supermicro/h8dme/Config.lb.kernel @@ -19,27 +19,27 @@ target h8dme mainboard supermicro/h8dme -option ROM_SIZE=0x200000 -option FALLBACK_SIZE=(ROM_SIZE-0x1000) +option CONFIG_ROM_SIZE=0x200000 +option CONFIG_FALLBACK_SIZE=(CONFIG_ROM_SIZE-0x1000) romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=1 - option ROM_IMAGE_SIZE=0x18000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_ROM_IMAGE_SIZE=0x18000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" "failover" diff --git a/targets/supermicro/h8dmr/Config-abuild.lb b/targets/supermicro/h8dmr/Config-abuild.lb index 8ee91ab323..683f9704f1 100644 --- a/targets/supermicro/h8dmr/Config-abuild.lb +++ b/targets/supermicro/h8dmr/Config-abuild.lb @@ -4,34 +4,34 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION=".0-failover" end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/supermicro/h8dmr/Config-lab.lb b/targets/supermicro/h8dmr/Config-lab.lb index 47cdc6454e..6fcde1fd91 100644 --- a/targets/supermicro/h8dmr/Config-lab.lb +++ b/targets/supermicro/h8dmr/Config-lab.lb @@ -22,27 +22,27 @@ target h8dmr mainboard supermicro/h8dmr -option ROM_SIZE=0x100000 +option CONFIG_ROM_SIZE=0x100000 # 44K for ATI ROM in 1M; 4K for failover -option FALLBACK_SIZE=(ROM_SIZE-0xC000) +option CONFIG_FALLBACK_SIZE=(CONFIG_ROM_SIZE-0xC000) romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=1 - option ROM_IMAGE_SIZE=0x18000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_ROM_IMAGE_SIZE=0x18000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" payload ../payload.elf.lzma end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" "failover" diff --git a/targets/supermicro/h8dmr/Config.lb b/targets/supermicro/h8dmr/Config.lb index 7ee6d29c55..37f54c252a 100644 --- a/targets/supermicro/h8dmr/Config.lb +++ b/targets/supermicro/h8dmr/Config.lb @@ -24,43 +24,43 @@ mainboard supermicro/h8dmr romimage "normal" # 48K for SCSI FW -# option ROM_SIZE = 475136 +# option CONFIG_ROM_SIZE = 475136 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 425984 +# option CONFIG_ROM_SIZE = 425984 # 64K for Etherboot -# option ROM_SIZE = 458752 +# option CONFIG_ROM_SIZE = 458752 # 44k for atixx.rom -# option ROM_SIZE = 479232 - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x18800 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 +# option CONFIG_ROM_SIZE = 479232 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x18800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" payload ../payload.elf end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x19800 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x19800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" payload ../payload.elf end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/supermicro/h8dmr/Config.lb.kernel b/targets/supermicro/h8dmr/Config.lb.kernel index 8e8c5a4f9a..4b8cf7c4ed 100644 --- a/targets/supermicro/h8dmr/Config.lb.kernel +++ b/targets/supermicro/h8dmr/Config.lb.kernel @@ -22,19 +22,19 @@ target h8dmr mainboard supermicro/h8dmr -option ROM_SIZE=0x200000 -option FALLBACK_SIZE=(ROM_SIZE-0x1000) +option CONFIG_ROM_SIZE=0x200000 +option CONFIG_FALLBACK_SIZE=(CONFIG_ROM_SIZE-0x1000) romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=1 -# option ROM_IMAGE_SIZE=0x19800 - option ROM_IMAGE_SIZE=0x18000 -# option ROM_IMAGE_SIZE=0x15800 -# option ROM_IMAGE_SIZE=0x13800 - option XIP_ROM_SIZE=0x40000 +# option CONFIG_ROM_IMAGE_SIZE=0x19800 + option CONFIG_ROM_IMAGE_SIZE=0x18000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -63,13 +63,13 @@ romimage "fallback" end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" "failover" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/technexion/tim8690/Config-abuild.lb b/targets/technexion/tim8690/Config-abuild.lb index d425fd5666..4e65fac881 100644 --- a/targets/technexion/tim8690/Config-abuild.lb +++ b/targets/technexion/tim8690/Config-abuild.lb @@ -4,23 +4,23 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/technexion/tim8690/Config.lb b/targets/technexion/tim8690/Config.lb index 80330e48dc..8a25959260 100644 --- a/targets/technexion/tim8690/Config.lb +++ b/targets/technexion/tim8690/Config.lb @@ -5,23 +5,23 @@ mainboard technexion/tim8690 romimage "normal" - option ROM_SIZE = 1024*512 - 55808 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_ROM_SIZE = 1024*512 - 55808 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 payload /home/daniel/mypayloads/link end romimage "fallback" - option FALLBACK_SIZE= 1024*512 - 55808 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_FALLBACK_SIZE= 1024*512 - 55808 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 payload /home/daniel/mypayloads/link end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/technologic/ts5300/Config-abuild.lb b/targets/technologic/ts5300/Config-abuild.lb index 6bd9cd56b7..2b619bf21a 100644 --- a/targets/technologic/ts5300/Config-abuild.lb +++ b/targets/technologic/ts5300/Config-abuild.lb @@ -2,18 +2,18 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "fallback" - option FALLBACK_SIZE = 256 * 1024 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=128 * 1024 # 0x10000 + option CONFIG_FALLBACK_SIZE = 256 * 1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=128 * 1024 # 0x10000 option COREBOOT_EXTRA_VERSION=".0-Fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/technologic/ts5300/Config.lb b/targets/technologic/ts5300/Config.lb index 329d8a81bb..720ff07301 100644 --- a/targets/technologic/ts5300/Config.lb +++ b/targets/technologic/ts5300/Config.lb @@ -4,29 +4,29 @@ target technologic_ts5300 mainboard technologic/ts5300 -option DEFAULT_CONSOLE_LOGLEVEL=3 -option MAXIMUM_CONSOLE_LOGLEVEL=3 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=3 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=3 option CONFIG_COMPRESS=1 #romimage "normal" -# option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x10000 +# option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x10000 # option COREBOOT_EXTRA_VERSION=".0-Normal" # payload /etc/hosts #end romimage "fallback" - option FALLBACK_SIZE = 128 * 1024 -# option ROM_SIZE=512*1024 -# option ROM_SECTION_SIZE=512*1024 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=32 * 1024 # 0x8000 -# option ROM_IMAGE_SIZE=48 * 1024 # 0x8000 -# option ROM_IMAGE_SIZE=64 * 1024 # 0x10000 -# option ROM_IMAGE_SIZE=512 * 1024 # 0x10000 + option CONFIG_FALLBACK_SIZE = 128 * 1024 +# option CONFIG_ROM_SIZE=512*1024 +# option CONFIG_ROM_SECTION_SIZE=512*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=32 * 1024 # 0x8000 +# option CONFIG_ROM_IMAGE_SIZE=48 * 1024 # 0x8000 +# option CONFIG_ROM_IMAGE_SIZE=64 * 1024 # 0x10000 +# option CONFIG_ROM_IMAGE_SIZE=512 * 1024 # 0x10000 # option COREBOOT_EXTRA_VERSION=".0-Fallback" option COREBOOT_EXTRA_VERSION=".0" payload /home/stepan/filo-ts5300.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/televideo/tc7020/Config.lb b/targets/televideo/tc7020/Config.lb index 339d33e0ab..c078209fb0 100644 --- a/targets/televideo/tc7020/Config.lb +++ b/targets/televideo/tc7020/Config.lb @@ -21,7 +21,7 @@ target tc7020 mainboard televideo/tc7020 -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 ## Enable VGA with a splash screen (only 640x480 to run on most monitors). ## We want to support up to 1024x768@16 so we need 2MiB video memory. @@ -31,21 +31,21 @@ option CONFIG_GX1_VIDEOMODE = 0 option CONFIG_SPLASH_GRAPHIC = 1 option CONFIG_VIDEO_MB = 2 -option DEFAULT_CONSOLE_LOGLEVEL = 6 -option MAXIMUM_CONSOLE_LOGLEVEL = 6 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6 romimage "normal" - option USE_FALLBACK_IMAGE = 0 - option ROM_IMAGE_SIZE = 64 * 1024 + option CONFIG_USE_FALLBACK_IMAGE = 0 + option CONFIG_ROM_IMAGE_SIZE = 64 * 1024 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 - option ROM_IMAGE_SIZE = 64 * 1024 + option CONFIG_USE_FALLBACK_IMAGE = 1 + option CONFIG_ROM_IMAGE_SIZE = 64 * 1024 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/thomson/ip1000/Config-abuild.lb b/targets/thomson/ip1000/Config-abuild.lb index 02175bc26b..bdacc46478 100644 --- a/targets/thomson/ip1000/Config-abuild.lb +++ b/targets/thomson/ip1000/Config-abuild.lb @@ -22,16 +22,16 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/thomson/ip1000/Config.lb b/targets/thomson/ip1000/Config.lb index 44aa77a475..b3d2c3baf8 100644 --- a/targets/thomson/ip1000/Config.lb +++ b/targets/thomson/ip1000/Config.lb @@ -25,9 +25,9 @@ mainboard thomson/ip1000 ## Total number of bytes allocated for coreboot use ## (fallback images and payloads). ## -# option ROM_SIZE = 1024 * 1024 +# option CONFIG_ROM_SIZE = 1024 * 1024 ## For VGA BIOS (-64k) -option ROM_SIZE = (1024 * 1024) - (64 * 1024) +option CONFIG_ROM_SIZE = (1024 * 1024) - (64 * 1024) ## ## VGA Console @@ -51,14 +51,14 @@ option CONFIG_VIDEO_MB = 8 ## ## Request this level of debugging output ## -option DEFAULT_CONSOLE_LOGLEVEL = 7 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7 romimage "fallback" - option USE_FALLBACK_IMAGE = 1 - option FALLBACK_SIZE = ROM_SIZE + option CONFIG_USE_FALLBACK_IMAGE = 1 + option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE option COREBOOT_EXTRA_VERSION = "_IP1000" payload /tmp/filo.elf # payload /tmp/eb-5.4.3-eepro100.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/totalimpact/briq/Config.lb b/targets/totalimpact/briq/Config.lb index 92288234fe..c352936ba4 100644 --- a/targets/totalimpact/briq/Config.lb +++ b/targets/totalimpact/briq/Config.lb @@ -12,47 +12,47 @@ option CONFIG_USE_INIT=1 option CONFIG_COMPRESS=0 ## Turn off POST codes -option NO_POST=1 +option CONFIG_NO_POST=1 ## Enable serial console -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 ## Boot linux from IDE option CONFIG_IDE_PAYLOAD=1 -option IDE_BOOT_DRIVE=0 -option IDE_SWAB=1 -option IDE_OFFSET=0 +option CONFIG_IDE_BOOT_DRIVE=0 +option CONFIG_IDE_SWAB=1 +option CONFIG_IDE_OFFSET=0 # ROM is 1Mb -option ROM_SIZE=1024*1024 +option CONFIG_ROM_SIZE=1024*1024 # Set stack and heap sizes (stage 2) -option STACK_SIZE=0x10000 -option HEAP_SIZE=0x10000 +option CONFIG_STACK_SIZE=0x10000 +option CONFIG_HEAP_SIZE=0x10000 # Sandpoint Demo Board romimage "normal" ## Base of ROM - option _ROMBASE=0xfff00000 + option CONFIG_ROMBASE=0xfff00000 ## Sandpoint reset vector - option _RESET=_ROMBASE+0x100 + option CONFIG_RESET=CONFIG_ROMBASE+0x100 ## Exception vectors (other than reset vector) - option _EXCEPTION_VECTORS=_RESET+0x100 + option CONFIG_EXCEPTION_VECTORS=CONFIG_RESET+0x100 ## Start of coreboot in the boot rom - ## = _RESET + exeception vector table size - option _ROMSTART=_RESET+0x3100 + ## = CONFIG_RESET + exeception vector table size + option CONFIG_ROMSTART=CONFIG_RESET+0x3100 ## Coreboot C code runs at this location in RAM - option _RAMBASE=0x00100000 - option _RAMSTART=0x00100000 + option CONFIG_RAMBASE=0x00100000 + option CONFIG_RAMSTART=0x00100000 option CONFIG_BRIQ_750FX=1 #option CONFIG_BRIQ_7400=1 end -buildrom ./coreboot.rom ROM_SIZE "normal" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" diff --git a/targets/tyan/s1846/Config.lb b/targets/tyan/s1846/Config.lb index dcc48ef1bf..4ebccfc52d 100644 --- a/targets/tyan/s1846/Config.lb +++ b/targets/tyan/s1846/Config.lb @@ -21,31 +21,31 @@ target s1846 mainboard tyan/s1846 -option ROM_SIZE = 256 * 1024 +option CONFIG_ROM_SIZE = 256 * 1024 -option MAINBOARD_VENDOR = "Tyan" -option MAINBOARD_PART_NUMBER = "S1846" +option CONFIG_MAINBOARD_VENDOR = "Tyan" +option CONFIG_MAINBOARD_PART_NUMBER = "S1846" # TODO: Add/fix PIRQ table. -option HAVE_PIRQ_TABLE = 0 -option IRQ_SLOT_COUNT = 0 # FIXME +option CONFIG_HAVE_PIRQ_TABLE = 0 +option CONFIG_IRQ_SLOT_COUNT = 0 # FIXME -option DEFAULT_CONSOLE_LOGLEVEL = 9 -option MAXIMUM_CONSOLE_LOGLEVEL = 9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_CONSOLE_VGA = 1 option CONFIG_PCI_ROM_RUN = 1 romimage "normal" - option USE_FALLBACK_IMAGE = 0 + option CONFIG_USE_FALLBACK_IMAGE = 0 option COREBOOT_EXTRA_VERSION = ".0Normal" payload /tmp/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE = 1 + option CONFIG_USE_FALLBACK_IMAGE = 1 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2735/Config.lb b/targets/tyan/s2735/Config.lb index cd2f774cee..a67f24f69e 100644 --- a/targets/tyan/s2735/Config.lb +++ b/targets/tyan/s2735/Config.lb @@ -8,14 +8,14 @@ mainboard tyan/s2735 # Tyan s2735 romimage "normal" # 48K for SCSI FW -# option ROM_SIZE = 512*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-48*1024 # 64K for Etherboot -# option ROM_SIZE = 512*1024-64*1024 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x11800 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 512*1024-64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x11800 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -28,9 +28,9 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x11800 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x11800 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -42,4 +42,4 @@ romimage "fallback" payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2850/Config.lb b/targets/tyan/s2850/Config.lb index 66b873c5e8..f6e6f3cf8c 100644 --- a/targets/tyan/s2850/Config.lb +++ b/targets/tyan/s2850/Config.lb @@ -8,18 +8,18 @@ mainboard tyan/s2850 # Tyan s2850 romimage "normal" # 48K for SCSI FW or ATI ROM - option ROM_SIZE = 512*1024-48*1024 + option CONFIG_ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-48*1024 # 64K for Etherboot -# option ROM_SIZE = 512*1024-64*1024 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x16000 -# option ROM_IMAGE_SIZE=0x17800 -# option ROM_IMAGE_SIZE=0x13c00 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 512*1024-64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x16000 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 +# option CONFIG_ROM_IMAGE_SIZE=0x13c00 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -36,13 +36,13 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x16000 -# option ROM_IMAGE_SIZE=0x17800 -# option ROM_IMAGE_SIZE=0x13c00 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x16000 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 +# option CONFIG_ROM_IMAGE_SIZE=0x13c00 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -58,4 +58,4 @@ romimage "fallback" # payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2875/Config.lb b/targets/tyan/s2875/Config.lb index b4388d1a1a..50346f776f 100644 --- a/targets/tyan/s2875/Config.lb +++ b/targets/tyan/s2875/Config.lb @@ -8,18 +8,18 @@ mainboard tyan/s2875 # Tyan s2875 romimage "normal" # 48K for SCSI FW or ATI ROM - option ROM_SIZE = 512*1024-48*1024 + option CONFIG_ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-48*1024 # 64K for Etherboot -# option ROM_SIZE = 512*1024-64*1024 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x16000 -# option ROM_IMAGE_SIZE=0x17800 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 512*1024-64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x16000 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -35,13 +35,13 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x16000 -# option ROM_IMAGE_SIZE=0x17800 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x16000 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -56,4 +56,4 @@ romimage "fallback" # payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2880/Config.lb b/targets/tyan/s2880/Config.lb index f1e2960ccd..fc40941f46 100644 --- a/targets/tyan/s2880/Config.lb +++ b/targets/tyan/s2880/Config.lb @@ -8,18 +8,18 @@ mainboard tyan/s2880 # Tyan s2880 romimage "normal" # 48K for SCSI FW or ATI ROM - option ROM_SIZE = 512*1024-48*1024 + option CONFIG_ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-48*1024 # 64K for Etherboot -# option ROM_SIZE = 512*1024-64*1024 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x16000 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x17800 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 512*1024-64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x16000 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -35,13 +35,13 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x16000 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x17800 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x16000 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -56,4 +56,4 @@ romimage "fallback" # payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2881/Config-lab.lb b/targets/tyan/s2881/Config-lab.lb index bc7ecf1188..ad42a5d388 100644 --- a/targets/tyan/s2881/Config-lab.lb +++ b/targets/tyan/s2881/Config-lab.lb @@ -5,19 +5,19 @@ target s2881 mainboard tyan/s2881 -option ROM_SIZE=0x100000 +option CONFIG_ROM_SIZE=0x100000 # 36K for ATI ROM in 1M -option FALLBACK_SIZE=(ROM_SIZE-0x9000) +option CONFIG_FALLBACK_SIZE=(CONFIG_ROM_SIZE-0x9000) # Tyan s2881 romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=1 - option ROM_IMAGE_SIZE=0x17000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_ROM_IMAGE_SIZE=0x17000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" payload ../payload.elf.lzma end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/tyan/s2881/Config.lb b/targets/tyan/s2881/Config.lb index 112236d347..010e704613 100644 --- a/targets/tyan/s2881/Config.lb +++ b/targets/tyan/s2881/Config.lb @@ -8,19 +8,19 @@ mainboard tyan/s2881 # Tyan s2881 romimage "normal" # 36K for ATI ROM - option ROM_SIZE = 512*1024-36*1024 + option CONFIG_ROM_SIZE = 512*1024-36*1024 # 48K for SCSI FW -# option ROM_SIZE = 512*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 36K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-36*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-36*1024 # 64K for Etherboot -# option ROM_SIZE = 512*1024-64*1024 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13000 -# option ROM_IMAGE_SIZE=0x16000 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 512*1024-64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13000 +# option CONFIG_ROM_IMAGE_SIZE=0x16000 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -37,12 +37,12 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13000 -# option ROM_IMAGE_SIZE=0x16000 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13000 +# option CONFIG_ROM_IMAGE_SIZE=0x16000 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -58,4 +58,4 @@ romimage "fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2882/Config-lab.lb b/targets/tyan/s2882/Config-lab.lb index b54dcd8d43..f72ee2da59 100644 --- a/targets/tyan/s2882/Config-lab.lb +++ b/targets/tyan/s2882/Config-lab.lb @@ -5,19 +5,19 @@ target s2882 mainboard tyan/s2882 -option ROM_SIZE=0x100000 +option CONFIG_ROM_SIZE=0x100000 # 36K for ATI ROM in 1M -option FALLBACK_SIZE=(ROM_SIZE-0x9000) +option CONFIG_FALLBACK_SIZE=(CONFIG_ROM_SIZE-0x9000) # Tyan s2882 romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=1 - option ROM_IMAGE_SIZE=0x17000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_ROM_IMAGE_SIZE=0x17000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" payload ../payload.elf.lzma end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/tyan/s2882/Config.lb b/targets/tyan/s2882/Config.lb index 404d9d95a8..a6d37479c4 100644 --- a/targets/tyan/s2882/Config.lb +++ b/targets/tyan/s2882/Config.lb @@ -8,16 +8,16 @@ mainboard tyan/s2882 # Tyan s2882 romimage "normal" # 36K for ATI ROM - option ROM_SIZE = 512*1024-36*1024 + option CONFIG_ROM_SIZE = 512*1024-36*1024 # 48K for SCSI FW and 36K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-36*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-36*1024 # 64K for Etherboot -# option ROM_SIZE = 512*1024-64*1024 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x16000 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 512*1024-64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x16000 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -32,11 +32,11 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x16000 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x16000 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -50,4 +50,4 @@ romimage "fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2885/Config.lb b/targets/tyan/s2885/Config.lb index 8f29db17ac..72877d2dff 100644 --- a/targets/tyan/s2885/Config.lb +++ b/targets/tyan/s2885/Config.lb @@ -8,17 +8,17 @@ mainboard tyan/s2885 # Tyan s2895 romimage "normal" # 48K for SCSI FW -# option ROM_SIZE = 512*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-48*1024 # 64K for Etherboot -# option ROM_SIZE = 512*1024-64*1024 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x17800 -# option ROM_IMAGE_SIZE=0x16200 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 512*1024-64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 +# option CONFIG_ROM_IMAGE_SIZE=0x16200 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -37,12 +37,12 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x17800 -# option ROM_IMAGE_SIZE=0x16200 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 +# option CONFIG_ROM_IMAGE_SIZE=0x16200 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -60,4 +60,4 @@ romimage "fallback" # payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_com2.zelf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2891/Config-abuild.lb b/targets/tyan/s2891/Config-abuild.lb index 95f4366ab1..bc651b964d 100644 --- a/targets/tyan/s2891/Config-abuild.lb +++ b/targets/tyan/s2891/Config-abuild.lb @@ -4,24 +4,24 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2891/Config-lab.lb b/targets/tyan/s2891/Config-lab.lb index 24b5d066b6..8253b038c9 100644 --- a/targets/tyan/s2891/Config-lab.lb +++ b/targets/tyan/s2891/Config-lab.lb @@ -5,19 +5,19 @@ target s2891 mainboard tyan/s2891 -option ROM_SIZE=0x100000 +option CONFIG_ROM_SIZE=0x100000 # 36K for ATI ROM in 1M -option FALLBACK_SIZE=(ROM_SIZE-0x9000) +option CONFIG_FALLBACK_SIZE=(CONFIG_ROM_SIZE-0x9000) # Tyan s2891 romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=1 - option ROM_IMAGE_SIZE=0x17000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_ROM_IMAGE_SIZE=0x17000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" payload ../payload.elf.lzma end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/tyan/s2891/Config.lb b/targets/tyan/s2891/Config.lb index fe91c36f7f..cab355e1b2 100644 --- a/targets/tyan/s2891/Config.lb +++ b/targets/tyan/s2891/Config.lb @@ -8,19 +8,19 @@ mainboard tyan/s2891 # Tyan s2891 romimage "normal" # 36K for ATI ROM in 1M - option ROM_SIZE = 1024*1024-36*1024 + option CONFIG_ROM_SIZE = 1024*1024-36*1024 # 48K for SCSI FW -# option ROM_SIZE = 512*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 36K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-36*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-36*1024 # 64K for Etherboot -# option ROM_SIZE = 512*1024-64*1024 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13000 -# option ROM_IMAGE_SIZE=0x16000 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 512*1024-64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13000 +# option CONFIG_ROM_IMAGE_SIZE=0x16000 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -38,12 +38,12 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13000 -# option ROM_IMAGE_SIZE=0x16000 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13000 +# option CONFIG_ROM_IMAGE_SIZE=0x16000 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -60,4 +60,4 @@ romimage "fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2891/Config.lb.com2 b/targets/tyan/s2891/Config.lb.com2 index eee6b0af56..24251e19cf 100644 --- a/targets/tyan/s2891/Config.lb.com2 +++ b/targets/tyan/s2891/Config.lb.com2 @@ -8,16 +8,16 @@ mainboard tyan/s2891 # Tyan s2891 romimage "normal" # 48K for SCSI FW or ATI ROM - option ROM_SIZE = 512*1024-48*1024 + option CONFIG_ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-48*1024 # 64K for Etherboot -# option ROM_SIZE = 512*1024-64*1024 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13000 - option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 512*1024-64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13000 + option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -34,11 +34,11 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13000 - option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13000 + option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -54,4 +54,4 @@ romimage "fallback" # payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2892/Config-abuild.lb b/targets/tyan/s2892/Config-abuild.lb index 95f4366ab1..bc651b964d 100644 --- a/targets/tyan/s2892/Config-abuild.lb +++ b/targets/tyan/s2892/Config-abuild.lb @@ -4,24 +4,24 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2892/Config-lab.lb b/targets/tyan/s2892/Config-lab.lb index 169023f783..c9d8584085 100644 --- a/targets/tyan/s2892/Config-lab.lb +++ b/targets/tyan/s2892/Config-lab.lb @@ -6,21 +6,21 @@ target s2892 mainboard tyan/s2892 # Leave Space for VGA BIOS -option ROM_SIZE = 1024*1024-36*1024 -#option ROM_SIZE = 1024*1024 +option CONFIG_ROM_SIZE = 1024*1024-36*1024 +#option CONFIG_ROM_SIZE = 1024*1024 option CONFIG_CONSOLE_SERIAL8250 = 1 option CONFIG_CONSOLE_VGA = 1 -option XIP_ROM_SIZE = 0x20000 -option ROM_IMAGE_SIZE = 0x18000 -option FALLBACK_SIZE = ROM_SIZE +option CONFIG_XIP_ROM_SIZE = 0x20000 +option CONFIG_ROM_IMAGE_SIZE = 0x18000 +option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE # Tyan s2892 romimage "fallback" option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=1 - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" payload ../payload.elf.lzma end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/tyan/s2892/Config.lb b/targets/tyan/s2892/Config.lb index 8dc2225561..82e4ca4f47 100644 --- a/targets/tyan/s2892/Config.lb +++ b/targets/tyan/s2892/Config.lb @@ -8,20 +8,20 @@ mainboard tyan/s2892 # Tyan s2892 romimage "normal" # 36K for ATI ROM in 1M - option ROM_SIZE = 1024*1024-36*1024 + option CONFIG_ROM_SIZE = 1024*1024-36*1024 # 48K for SCSI FW or ATI ROM -# option ROM_SIZE = 512*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-48*1024 # 64K for Etherboot -# option ROM_SIZE = 512*1024-64*1024 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x16380 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x17800 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 512*1024-64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x16380 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -38,13 +38,13 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x16380 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x17800 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x16380 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -60,4 +60,4 @@ romimage "fallback" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2895/Config-abuild.lb b/targets/tyan/s2895/Config-abuild.lb index 88dd1684e3..b1c927705b 100644 --- a/targets/tyan/s2895/Config-abuild.lb +++ b/targets/tyan/s2895/Config-abuild.lb @@ -4,33 +4,33 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/tyan/s2895/Config-lab.lb b/targets/tyan/s2895/Config-lab.lb index fa4bbf0cc8..e5368925d9 100644 --- a/targets/tyan/s2895/Config-lab.lb +++ b/targets/tyan/s2895/Config-lab.lb @@ -7,19 +7,19 @@ mainboard tyan/s2895 option CONFIG_CONSOLE_SERIAL8250 = 1 option CONFIG_CONSOLE_VGA = 1 -option XIP_ROM_SIZE = 0x20000 -option ROM_IMAGE_SIZE = 0x18000 -option HAVE_FAILOVER_BOOT = 0 -option FAILOVER_SIZE = 0 -option FALLBACK_SIZE = ROM_SIZE +option CONFIG_XIP_ROM_SIZE = 0x20000 +option CONFIG_ROM_IMAGE_SIZE = 0x18000 +option CONFIG_HAVE_FAILOVER_BOOT = 0 +option CONFIG_FAILOVER_SIZE = 0 +option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE option CONFIG_COMPRESSED_PAYLOAD_LZMA = 1 option CONFIG_PRECOMPRESSED_PAYLOAD = 1 # Tyan s2895 romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" payload ../payload.elf.lzma end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/tyan/s2895/Config.lb b/targets/tyan/s2895/Config.lb index 0b5d73a300..69a83f1fe7 100644 --- a/targets/tyan/s2895/Config.lb +++ b/targets/tyan/s2895/Config.lb @@ -8,21 +8,21 @@ mainboard tyan/s2895 # Tyan s2895 romimage "normal" # 48K for SCSI FW -# option ROM_SIZE = 475136 +# option CONFIG_ROM_SIZE = 475136 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 425984 +# option CONFIG_ROM_SIZE = 425984 # 64K for Etherboot -# option ROM_SIZE = 458752 +# option CONFIG_ROM_SIZE = 458752 # 64K for NIC option 48K for Raid option rom -# option ROM_SIZE = 409600 - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x15000 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x17800 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 409600 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x15000 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -46,14 +46,14 @@ romimage "normal" end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x11800 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x15000 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x17800 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x11800 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x15000 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x17800 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -74,13 +74,13 @@ romimage "fallback" end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2912/Config-abuild.lb b/targets/tyan/s2912/Config-abuild.lb index 88dd1684e3..b1c927705b 100644 --- a/targets/tyan/s2912/Config-abuild.lb +++ b/targets/tyan/s2912/Config-abuild.lb @@ -4,33 +4,33 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/tyan/s2912/Config.lb b/targets/tyan/s2912/Config.lb index 28deabcf6c..d31438869a 100644 --- a/targets/tyan/s2912/Config.lb +++ b/targets/tyan/s2912/Config.lb @@ -27,20 +27,20 @@ mainboard tyan/s2912 # serengeti_leopard romimage "normal" # 48K for SCSI FW -# option ROM_SIZE = 475136 +# option CONFIG_ROM_SIZE = 475136 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 425984 +# option CONFIG_ROM_SIZE = 425984 # 64K for Etherboot -# option ROM_SIZE = 458752 +# option CONFIG_ROM_SIZE = 458752 # 44k for atixx.rom -# option ROM_SIZE = 479232 - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x18800 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 +# option CONFIG_ROM_SIZE = 479232 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x18800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -62,13 +62,13 @@ romimage "normal" end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x13800 -# option ROM_IMAGE_SIZE=0x19800 - option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 +# option CONFIG_ROM_IMAGE_SIZE=0x19800 + option CONFIG_ROM_IMAGE_SIZE=0x20000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -95,12 +95,12 @@ romimage "fallback" end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/tyan/s2912/Config.lb.kernel b/targets/tyan/s2912/Config.lb.kernel index 3ca4f324d7..e09a5580c0 100644 --- a/targets/tyan/s2912/Config.lb.kernel +++ b/targets/tyan/s2912/Config.lb.kernel @@ -24,19 +24,19 @@ target s2912 mainboard tyan/s2912 -option ROM_SIZE=0x200000 -option FALLBACK_SIZE=(ROM_SIZE-0x1000) +option CONFIG_ROM_SIZE=0x200000 +option CONFIG_FALLBACK_SIZE=(CONFIG_ROM_SIZE-0x1000) romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=1 -# option ROM_IMAGE_SIZE=0x19800 - option ROM_IMAGE_SIZE=0x17000 -# option ROM_IMAGE_SIZE=0x15800 -# option ROM_IMAGE_SIZE=0x13800 - option XIP_ROM_SIZE=0x40000 +# option CONFIG_ROM_IMAGE_SIZE=0x19800 + option CONFIG_ROM_IMAGE_SIZE=0x17000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -65,13 +65,13 @@ romimage "fallback" end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" "failover" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2912_fam10/Config-abuild.lb b/targets/tyan/s2912_fam10/Config-abuild.lb index 7431783fb4..6c075c3d11 100644 --- a/targets/tyan/s2912_fam10/Config-abuild.lb +++ b/targets/tyan/s2912_fam10/Config-abuild.lb @@ -22,36 +22,36 @@ target tyan_s2912_fam10 mainboard tyan/s2912_fam10 option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ romimage "normal" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x34000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x34000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION=".0-Normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x34000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x34000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION=".0-Fallback" payload __PAYLOAD__ end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION=".0-Failover" end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/tyan/s2912_fam10/Config.lb b/targets/tyan/s2912_fam10/Config.lb index 5c9dfcd1e5..e08f657081 100644 --- a/targets/tyan/s2912_fam10/Config.lb +++ b/targets/tyan/s2912_fam10/Config.lb @@ -25,34 +25,34 @@ target s2912_fam10 mainboard tyan/s2912_fam10 # Make room for ATI ES1000 VGA ROM -option ROM_SIZE=ROM_SIZE-44*1024 +option CONFIG_ROM_SIZE=ROM_SIZE-44*1024 romimage "normal" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../../payloads/forcedeth--filo_hda2_vga_5_4_2_mcp55.zelf payload ../payload.elf end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x40000 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../../payloads/forcedeth--filo_hda2_vga_5_4_2_mcp55.zelf payload ../payload.elf end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" "failover" diff --git a/targets/tyan/s2912_fam10/Config.lb.kernel b/targets/tyan/s2912_fam10/Config.lb.kernel index 3ca4f324d7..e09a5580c0 100644 --- a/targets/tyan/s2912_fam10/Config.lb.kernel +++ b/targets/tyan/s2912_fam10/Config.lb.kernel @@ -24,19 +24,19 @@ target s2912 mainboard tyan/s2912 -option ROM_SIZE=0x200000 -option FALLBACK_SIZE=(ROM_SIZE-0x1000) +option CONFIG_ROM_SIZE=0x200000 +option CONFIG_FALLBACK_SIZE=(CONFIG_ROM_SIZE-0x1000) romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FAILOVER_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=1 option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=1 -# option ROM_IMAGE_SIZE=0x19800 - option ROM_IMAGE_SIZE=0x17000 -# option ROM_IMAGE_SIZE=0x15800 -# option ROM_IMAGE_SIZE=0x13800 - option XIP_ROM_SIZE=0x40000 +# option CONFIG_ROM_IMAGE_SIZE=0x19800 + option CONFIG_ROM_IMAGE_SIZE=0x17000 +# option CONFIG_ROM_IMAGE_SIZE=0x15800 +# option CONFIG_ROM_IMAGE_SIZE=0x13800 + option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -65,13 +65,13 @@ romimage "fallback" end romimage "failover" - option USE_FAILOVER_IMAGE=1 - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE + option CONFIG_USE_FAILOVER_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=CONFIG_FAILOVER_SIZE + option CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end -buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" -#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" "failover" +#buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s4880/Config.lb b/targets/tyan/s4880/Config.lb index abb9912713..6b98702f49 100644 --- a/targets/tyan/s4880/Config.lb +++ b/targets/tyan/s4880/Config.lb @@ -8,16 +8,16 @@ mainboard tyan/s4880 # Tyan s4880 romimage "normal" # 48K for SCSI FW or ATI ROM - option ROM_SIZE = 512*1024-48*1024 + option CONFIG_ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-48*1024 # 64K for Etherboot -# option ROM_SIZE = 512*1024-64*1024 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x19000 -# option ROM_IMAGE_SIZE=0x19c00 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 512*1024-64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x19000 +# option CONFIG_ROM_IMAGE_SIZE=0x19c00 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -32,11 +32,11 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x19000 -# option ROM_IMAGE_SIZE=0x19c00 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x19000 +# option CONFIG_ROM_IMAGE_SIZE=0x19c00 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -50,4 +50,4 @@ romimage "fallback" # payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s4882/Config.lb b/targets/tyan/s4882/Config.lb index bcf903db9b..cc44c1b32c 100644 --- a/targets/tyan/s4882/Config.lb +++ b/targets/tyan/s4882/Config.lb @@ -8,18 +8,18 @@ mainboard tyan/s4882 # Tyan s4882 romimage "normal" # 48K for SCSI FW or ATI ROM - option ROM_SIZE = 512*1024-48*1024 + option CONFIG_ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 48K for ATI ROM -# option ROM_SIZE = 512*1024-48*1024-48*1024 +# option CONFIG_ROM_SIZE = 512*1024-48*1024-48*1024 # 64K for Etherboot -# option ROM_SIZE = 512*1024-64*1024 - option USE_FALLBACK_IMAGE=0 -# option ROM_IMAGE_SIZE=0x19000 -# option ROM_IMAGE_SIZE=0x19c00 -# option ROM_IMAGE_SIZE=0x18800 -# option ROM_IMAGE_SIZE=0x16200 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 +# option CONFIG_ROM_SIZE = 512*1024-64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 +# option CONFIG_ROM_IMAGE_SIZE=0x19000 +# option CONFIG_ROM_IMAGE_SIZE=0x19c00 +# option CONFIG_ROM_IMAGE_SIZE=0x18800 +# option CONFIG_ROM_IMAGE_SIZE=0x16200 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -36,13 +36,13 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 -# option ROM_IMAGE_SIZE=0x19000 -# option ROM_IMAGE_SIZE=0x19c00 -# option ROM_IMAGE_SIZE=0x18800 -# option ROM_IMAGE_SIZE=0x16200 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 +# option CONFIG_ROM_IMAGE_SIZE=0x19000 +# option CONFIG_ROM_IMAGE_SIZE=0x19c00 +# option CONFIG_ROM_IMAGE_SIZE=0x18800 +# option CONFIG_ROM_IMAGE_SIZE=0x16200 + option CONFIG_ROM_IMAGE_SIZE=0x20000 + option CONFIG_XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" # payload ../../../payloads/tg3--ide_disk.zelf # payload ../../../payloads/filo.elf @@ -58,4 +58,4 @@ romimage "fallback" # payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia-cn/Config-abuild.lb b/targets/via/epia-cn/Config-abuild.lb index d364cb7cbd..2a65acae0d 100644 --- a/targets/via/epia-cn/Config-abuild.lb +++ b/targets/via/epia-cn/Config-abuild.lb @@ -4,18 +4,18 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/via/epia-cn/Config.lb b/targets/via/epia-cn/Config.lb index c6d82e5b5d..3d51302956 100644 --- a/targets/via/epia-cn/Config.lb +++ b/targets/via/epia-cn/Config.lb @@ -22,22 +22,22 @@ target via_epia_cn mainboard via/epia-cn -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 # coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 # # Generate the final ROM like this: # cat vgabios bochsbios coreboot.rom > coreboot.rom.final # -option ROM_SIZE = (512 * 1024) - (64 * 1024) - (64 * 1024) +option CONFIG_ROM_SIZE = (512 * 1024) - (64 * 1024) - (64 * 1024) romimage "image" option COREBOOT_EXTRA_VERSION = "-epiacn" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" diff --git a/targets/via/epia-m/Config-abuild.lb b/targets/via/epia-m/Config-abuild.lb index 52c1711bd2..85066ba0d7 100644 --- a/targets/via/epia-m/Config-abuild.lb +++ b/targets/via/epia-m/Config-abuild.lb @@ -2,26 +2,26 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=256*1024 +option CONFIG_ROM_SIZE=256*1024 romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION=".0-Normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=64*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION=".0-Fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia-m/Config.512kflash.lb b/targets/via/epia-m/Config.512kflash.lb index 88d13821ff..0cf7e1c593 100644 --- a/targets/via/epia-m/Config.512kflash.lb +++ b/targets/via/epia-m/Config.512kflash.lb @@ -5,25 +5,25 @@ target epia-m.512kflash mainboard via/epia-m -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 -option HAVE_OPTION_TABLE=1 +option CONFIG_HAVE_OPTION_TABLE=1 option CONFIG_ROM_PAYLOAD=1 -option HAVE_FALLBACK_BOOT=1 +option CONFIG_HAVE_FALLBACK_BOOT=1 ### ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -option FALLBACK_SIZE=131072 +option CONFIG_FALLBACK_SIZE=131072 ## Coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 # ### @@ -35,8 +35,8 @@ option _RAMBASE=0x00004000 # Via EPIA M # romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -44,12 +44,12 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf payload ../../../../../lnxieepro100.ebi end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia-m/Config.etherboot.lb b/targets/via/epia-m/Config.etherboot.lb index 6e59424be8..0ceaf171ec 100644 --- a/targets/via/epia-m/Config.etherboot.lb +++ b/targets/via/epia-m/Config.etherboot.lb @@ -5,24 +5,24 @@ target epia-m mainboard via/epia-m -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 -option ROM_SIZE=256*1024 +option CONFIG_ROM_SIZE=256*1024 -option HAVE_OPTION_TABLE=1 +option CONFIG_HAVE_OPTION_TABLE=1 option CONFIG_ROM_PAYLOAD=1 -option HAVE_FALLBACK_BOOT=1 +option CONFIG_HAVE_FALLBACK_BOOT=1 ### ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -option FALLBACK_SIZE=131072 +option CONFIG_FALLBACK_SIZE=131072 ## Coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 # ### @@ -34,8 +34,8 @@ option _RAMBASE=0x00004000 # Via EPIA-M # romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -43,12 +43,12 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf payload ../../../../../lnxieepro100.ebi end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia-m/Config.filo.lb b/targets/via/epia-m/Config.filo.lb index bb5bc62a0e..02313ff15a 100644 --- a/targets/via/epia-m/Config.filo.lb +++ b/targets/via/epia-m/Config.filo.lb @@ -5,24 +5,24 @@ target epia-m mainboard via/epia-m -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 -option ROM_SIZE=256*1024 +option CONFIG_ROM_SIZE=256*1024 -option HAVE_OPTION_TABLE=1 +option CONFIG_HAVE_OPTION_TABLE=1 option CONFIG_ROM_PAYLOAD=1 -option HAVE_FALLBACK_BOOT=1 +option CONFIG_HAVE_FALLBACK_BOOT=1 ### ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -option FALLBACK_SIZE=131072 +option CONFIG_FALLBACK_SIZE=131072 ## Coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 # ### @@ -34,8 +34,8 @@ option _RAMBASE=0x00004000 # EPIA-M # romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -44,8 +44,8 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -53,4 +53,4 @@ romimage "fallback" payload ../../../../../../filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia-m/Config.lb b/targets/via/epia-m/Config.lb index 19f26d26cb..2f9d6e1d3d 100644 --- a/targets/via/epia-m/Config.lb +++ b/targets/via/epia-m/Config.lb @@ -3,16 +3,16 @@ target via_epia-m mainboard via/epia-m -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 -option ROM_SIZE=256*1024 +option CONFIG_ROM_SIZE=256*1024 -option HAVE_OPTION_TABLE=1 +option CONFIG_HAVE_OPTION_TABLE=1 option CONFIG_ROM_PAYLOAD=1 -option HAVE_FALLBACK_BOOT=1 +option CONFIG_HAVE_FALLBACK_BOOT=1 #option CONFIG_COMPRESSED_PAYLOAD_NRV2B=1 option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0 @@ -21,28 +21,28 @@ option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0 ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -option FALLBACK_SIZE=131072 +option CONFIG_FALLBACK_SIZE=131072 ## Coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 # # Via EPIA M # romimage "normal" - option USE_FALLBACK_IMAGE=0 -#option ROM_IMAGE_SIZE=128*1024 - option ROM_IMAGE_SIZE=64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 +#option CONFIG_ROM_IMAGE_SIZE=128*1024 + option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION=".0-Normal" payload $(HOME)/svn/payload.elf end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - #option ROM_IMAGE_SIZE=128*1024 - option ROM_IMAGE_SIZE=60*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + #option CONFIG_ROM_IMAGE_SIZE=128*1024 + option CONFIG_ROM_IMAGE_SIZE=60*1024 option COREBOOT_EXTRA_VERSION=".0-Fallback" payload $(HOME)/svn/payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia-m/Config.vga.filo b/targets/via/epia-m/Config.vga.filo index c1f88b0bd9..86b4fb29b9 100644 --- a/targets/via/epia-m/Config.vga.filo +++ b/targets/via/epia-m/Config.vga.filo @@ -5,23 +5,23 @@ target epia-m mainboard via/epia-m -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 -option ROM_SIZE=256*1024 -option HAVE_OPTION_TABLE=1 +option CONFIG_ROM_SIZE=256*1024 +option CONFIG_HAVE_OPTION_TABLE=1 option CONFIG_ROM_PAYLOAD=1 -option HAVE_FALLBACK_BOOT=1 +option CONFIG_HAVE_FALLBACK_BOOT=1 ### ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -option FALLBACK_SIZE=0x18000 +option CONFIG_FALLBACK_SIZE=0x18000 ## Coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 ### ### Compute the start location and size size of @@ -32,19 +32,19 @@ option _RAMBASE=0x00004000 # EPIA-M # romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0xc000 - option ROM_SECTION_OFFSET=0x10000 - option ROM_SECTION_SIZE=0x18000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0xc000 + option CONFIG_ROM_SECTION_OFFSET=0x10000 + option CONFIG_ROM_SECTION_SIZE=0x18000 option COREBOOT_EXTRA_VERSION=".0-Normal" payload $(HOME)/svn/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0xc000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0xc000 option COREBOOT_EXTRA_VERSION=".0-Fallback" payload $(HOME)/svn/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia-m700/Config.lb b/targets/via/epia-m700/Config.lb index 4cb630882a..ecedd02070 100644 --- a/targets/via/epia-m700/Config.lb +++ b/targets/via/epia-m700/Config.lb @@ -26,4 +26,4 @@ romimage "image" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" diff --git a/targets/via/epia/Config.512kflash.lb b/targets/via/epia/Config.512kflash.lb index ff2e4da303..c904b414d8 100644 --- a/targets/via/epia/Config.512kflash.lb +++ b/targets/via/epia/Config.512kflash.lb @@ -4,13 +4,13 @@ target epia.512kflash mainboard via/epia -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 # # Via Epia romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -18,12 +18,12 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf payload ../../../../../lnxieepro100.ebi end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia/Config.512kflash.linuxtiny.lb b/targets/via/epia/Config.512kflash.linuxtiny.lb index 4a7702e4ce..b6b184b5d0 100644 --- a/targets/via/epia/Config.512kflash.linuxtiny.lb +++ b/targets/via/epia/Config.512kflash.linuxtiny.lb @@ -4,18 +4,18 @@ target epia.512kflash.linuxtiny mainboard via/epia -option ROM_SIZE=512*1024 -option FALLBACK_SIZE=ROM_SIZE -option MAXIMUM_CONSOLE_LOGLEVEL=9 -option DEFAULT_CONSOLE_LOGLEVEL=9 +option CONFIG_ROM_SIZE=512*1024 +option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=9 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=64*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf payload /tmp/linux.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/via/epia/Config.filo.lb b/targets/via/epia/Config.filo.lb index 0657cdb7e6..5107037135 100644 --- a/targets/via/epia/Config.filo.lb +++ b/targets/via/epia/Config.filo.lb @@ -7,8 +7,8 @@ mainboard via/epia # # Via Epia romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -17,8 +17,8 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -26,4 +26,4 @@ romimage "fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia/Config.ituner.filo.lb b/targets/via/epia/Config.ituner.filo.lb index 799dae3965..ddfec5e08c 100644 --- a/targets/via/epia/Config.ituner.filo.lb +++ b/targets/via/epia/Config.ituner.filo.lb @@ -4,13 +4,13 @@ target epia-ituner-filo mainboard via/epia -option MAXIMUM_CONSOLE_LOGLEVEL=9 -option DEFAULT_CONSOLE_LOGLEVEL=9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=9 # # Via Epia romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -19,8 +19,8 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -28,4 +28,4 @@ romimage "fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia/Config.lb b/targets/via/epia/Config.lb index f93088da90..72440e1538 100644 --- a/targets/via/epia/Config.lb +++ b/targets/via/epia/Config.lb @@ -8,13 +8,13 @@ target epia mainboard via/epia -option MAXIMUM_CONSOLE_LOGLEVEL=9 -option DEFAULT_CONSOLE_LOGLEVEL=9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=9 # # Via Epia romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -23,8 +23,8 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -32,4 +32,4 @@ romimage "fallback" payload /etc/hosts end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/pc2500e/Config-abuild.lb b/targets/via/pc2500e/Config-abuild.lb index c590daaa5e..b7bd85b8af 100644 --- a/targets/via/pc2500e/Config-abuild.lb +++ b/targets/via/pc2500e/Config-abuild.lb @@ -22,19 +22,19 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC = "CROSSCC" -option CROSS_COMPILE = "CROSS_PREFIX" -option HOSTCC = "CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE = "CROSS_PREFIX" +option CONFIG_HOSTCC = "CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE = 512 * 1024 +option CONFIG_ROM_SIZE = 512 * 1024 romimage "image" - option USE_FALLBACK_IMAGE = 1 - option ROM_IMAGE_SIZE = 128 * 1024 + option CONFIG_USE_FALLBACK_IMAGE = 1 + option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" diff --git a/targets/via/pc2500e/Config.lb b/targets/via/pc2500e/Config.lb index 9846b4cdf1..4d8fa8ebe6 100644 --- a/targets/via/pc2500e/Config.lb +++ b/targets/via/pc2500e/Config.lb @@ -26,4 +26,4 @@ romimage "image" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" diff --git a/targets/via/vt8454c/Config-abuild.lb b/targets/via/vt8454c/Config-abuild.lb index a6c5ef1553..eb67dfae96 100644 --- a/targets/via/vt8454c/Config-abuild.lb +++ b/targets/via/vt8454c/Config-abuild.lb @@ -25,19 +25,19 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 __COMPRESSION__ __LOGLEVEL__ romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" #pci_rom $(TOP)/via-cx700.rom vendor_id=0x1106 device_id=0x3157 diff --git a/targets/via/vt8454c/Config.lb b/targets/via/vt8454c/Config.lb index b98352b8d3..cb42703260 100644 --- a/targets/via/vt8454c/Config.lb +++ b/targets/via/vt8454c/Config.lb @@ -23,21 +23,21 @@ target via_vt8454c mainboard via/vt8454c -option MAXIMUM_CONSOLE_LOGLEVEL=5 -option DEFAULT_CONSOLE_LOGLEVEL=5 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=5 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=5 -option ROM_SIZE=(512-64)*1024 +option CONFIG_ROM_SIZE=(512-64)*1024 romimage "normal" - option USE_FALLBACK_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 option COREBOOT_EXTRA_VERSION=".0-normal" payload $(HOME)/payload.elf end romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 option COREBOOT_EXTRA_VERSION=".0-fallback" payload $(HOME)/payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" |