target config fixup

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1823 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

3 files changed, 23 insertions, 285 deletions

diff --git a/targets/amd/quartet/Config.lb b/targets/amd/quartet/Config.lb
index a67c682269..9f264ca908 100644
--- a/targets/amd/quartet/Config.lb
+++ b/targets/amd/quartet/Config.lb
@@ -1,111 +1,20 @@
-# Sample config file for building AMD Quartet images
-# This will make a target directory of ./quartet
-
-loadoptions
+# AMD Quartet
 
 target quartet
+mainboard amd/quartet
 
-uses ARCH
-uses CONFIG_COMPRESS
-uses CONFIG_IOAPIC
-uses CONFIG_ROM_STREAM
-uses CONFIG_ROM_STREAM_START
-uses CONFIG_UDELAY_TSC
-uses CPU_FIXUP
-uses FALLBACK_SIZE
-uses HAVE_FALLBACK_BOOT
-uses HAVE_MP_TABLE
-uses HAVE_PIRQ_TABLE
-uses HAVE_HARD_RESET
-uses i586
-uses i686
-uses INTEL_PPRO_MTRR
-uses HEAP_SIZE
-uses IRQ_SLOT_COUNT
-uses k7
-uses k8
-uses MAINBOARD_PART_NUMBER
-uses MAINBOARD_VENDOR
-uses CONFIG_SMP
-uses CONFIG_MAX_CPUS
-uses MEMORY_HOLE
-uses PAYLOAD_SIZE
-uses _RAMBASE
-uses _ROMBASE
-uses ROM_IMAGE_SIZE
-uses ROM_SECTION_OFFSET
-uses ROM_SECTION_SIZE
-uses ROM_SIZE
-uses STACK_SIZE
-uses USE_FALLBACK_IMAGE
-uses USE_OPTION_TABLE
-uses HAVE_OPTION_TABLE
-uses MAXIMUM_CONSOLE_LOGLEVEL
-uses  DEFAULT_CONSOLE_LOGLEVEL
-uses  CONFIG_CONSOLE_SERIAL8250
-uses MAINBOARD
-uses CONFIG_CHIP_CONFIGURE
-uses XIP_ROM_SIZE
-uses XIP_ROM_BASE
-uses LINUXBIOS_EXTRA_VERSION
-uses HAVE_ACPI_TABLES
-uses CC
-
-option CC="gcc -m32"
-
-option CONFIG_CHIP_CONFIGURE=1
-
-option  MAXIMUM_CONSOLE_LOGLEVEL=7
-option  DEFAULT_CONSOLE_LOGLEVEL=7
-option  CONFIG_CONSOLE_SERIAL8250=1
-
-option CPU_FIXUP=1
-option CONFIG_UDELAY_TSC=0
-option i686=1
-option i586=1
-option INTEL_PPRO_MTRR=1
-option k7=1
-option k8=1
-
-option ROM_SIZE=524288
-
-option HAVE_OPTION_TABLE=1
-option CONFIG_ROM_STREAM=1
-option HAVE_FALLBACK_BOOT=1
-option HAVE_HARD_RESET=1
-option HAVE_ACPI_TABLES=1
-
-###
-### Compute the location and size of where this firmware image
-### (linuxBIOS plus bootloader) will live in the boot rom chip.
-###
-option FALLBACK_SIZE=0x40000
-
-## LinuxBIOS C code runs at this location in RAM
-option _RAMBASE=0x00004000
-
-#
-###
-### Compute the start location and size size of
-### The linuxBIOS bootloader.
-###
-
-#
-# AMD Quartet
 romimage "normal"
 	option USE_FALLBACK_IMAGE=0
 	option ROM_IMAGE_SIZE=0x10000
-	option LINUXBIOS_EXTRA_VERSION=".0Normal"
-	mainboard amd/quartet
-	payload /suse/stepan/tg3--ide_disk.zelf
+	option LINUXBIOS_EXTRA_VERSION=".0-Normal"
+	payload /usr/share/LinuxBIOS/tg3--ide_disk.zelf
 end
 
 romimage "fallback" 
 	option USE_FALLBACK_IMAGE=1
 	option ROM_IMAGE_SIZE=0x10000
-	option LINUXBIOS_EXTRA_VERSION=".0Fallback"
-	mainboard amd/quartet
-	payload /suse/stepan/tg3--ide_disk.zelf
+	option LINUXBIOS_EXTRA_VERSION=".0-Fallback"
+	payload /usr/share/LinuxBIOS/tg3--ide_disk.zelf
 end
 
 buildrom ./quartet.rom ROM_SIZE "normal" "fallback"
diff --git a/targets/amd/serenade/Config.lb b/targets/amd/serenade/Config.lb
index b4e8014804..23ae75bd3e 100644
--- a/targets/amd/serenade/Config.lb
+++ b/targets/amd/serenade/Config.lb
@@ -1,113 +1,20 @@
-# the AMD Serenade
-# This will make a target directory of ./e325
-
-loadoptions
+# AMD Serenade
 
 target serenade
+mainboard amd/serenade
 
-uses ARCH
-uses CONFIG_COMPRESS
-uses CONFIG_IOAPIC
-uses CONFIG_ROM_STREAM
-uses CONFIG_ROM_STREAM_START
-uses CONFIG_SERIAL_POST
-uses NO_POST
-uses CONFIG_UDELAY_TSC
-uses CPU_FIXUP
-uses FALLBACK_SIZE
-uses HAVE_FALLBACK_BOOT
-uses HAVE_MP_TABLE
-uses HAVE_PIRQ_TABLE
-uses HAVE_HARD_RESET
-uses i586
-uses i686
-uses INTEL_PPRO_MTRR
-uses HEAP_SIZE
-uses IRQ_SLOT_COUNT
-uses k7
-uses k8
-uses MAINBOARD_PART_NUMBER
-uses MAINBOARD_VENDOR
-uses CONFIG_SMP
-uses CONFIG_MAX_CPUS
-uses MEMORY_HOLE
-uses PAYLOAD_SIZE
-uses _RAMBASE
-uses _ROMBASE
-uses ROM_IMAGE_SIZE
-uses ROM_SECTION_OFFSET
-uses ROM_SECTION_SIZE
-uses ROM_SIZE
-uses STACK_SIZE
-uses USE_FALLBACK_IMAGE
-uses USE_OPTION_TABLE
-uses HAVE_OPTION_TABLE
-uses MAXIMUM_CONSOLE_LOGLEVEL
-uses  DEFAULT_CONSOLE_LOGLEVEL
-uses  CONFIG_CONSOLE_SERIAL8250
-uses MAINBOARD
-uses CONFIG_CHIP_CONFIGURE
-uses XIP_ROM_SIZE
-uses XIP_ROM_BASE
-uses LINUXBIOS_EXTRA_VERSION
-
-option CONFIG_CHIP_CONFIGURE=1
-
-option  MAXIMUM_CONSOLE_LOGLEVEL=8
-option  DEFAULT_CONSOLE_LOGLEVEL=8
-option  CONFIG_CONSOLE_SERIAL8250=1
-option  CONFIG_SERIAL_POST=1
-option  NO_POST=0
-
-option CPU_FIXUP=1
-option CONFIG_UDELAY_TSC=0
-option i686=1
-option i586=1
-option INTEL_PPRO_MTRR=1
-option k7=1
-option k8=1
-
-option ROM_SIZE=1048576
-
-
-option HAVE_OPTION_TABLE=1
-option CONFIG_ROM_STREAM=1
-option HAVE_FALLBACK_BOOT=1
-
-###
-### Compute the location and size of where this firmware image
-### (linuxBIOS plus bootloader) will live in the boot rom chip.
-###
-option FALLBACK_SIZE=131072
-
-## LinuxBIOS C code runs at this location in RAM
-option _RAMBASE=0x00004000
-
-#
-###
-### Compute the start location and size size of
-### The linuxBIOS bootloader.
-###
-
-#
-# Arima hdama
 romimage "normal"
 	option USE_FALLBACK_IMAGE=0
 	option ROM_IMAGE_SIZE=0x10000
-	option LINUXBIOS_EXTRA_VERSION=".0Normal"
-	mainboard amd/serenade
+	option LINUXBIOS_EXTRA_VERSION=".0-Normal"
 	payload /home/ollie/work/filo-0.4.1/filo.elf
 end
 
 romimage "fallback" 
 	option USE_FALLBACK_IMAGE=1
 	option ROM_IMAGE_SIZE=0x10000
-	option LINUXBIOS_EXTRA_VERSION=".0Fallback"
-	mainboard amd/serenade
+	option LINUXBIOS_EXTRA_VERSION=".0-Fallback"
 	payload /home/ollie/work/filo-0.4.1/filo.elf
-
-# use this to test a build if you don't have the etherboot
-#	payload /etc/hosts
 end
 
-buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"
+buildrom ./serenade.rom ROM_SIZE "normal" "fallback"
diff --git a/targets/amd/solo/Config-8MBit.lb b/targets/amd/solo/Config-8MBit.lb
index f979ee62de..cd54572e53 100644
--- a/targets/amd/solo/Config-8MBit.lb
+++ b/targets/amd/solo/Config-8MBit.lb
@@ -1,102 +1,24 @@
-# This config file will build an image without normal/fallback mechanism
-# but with a kernel image builtin instead
-#
-# This has not been tested due to a bug in the SST49LF080A 
+# AMD Solo
+# This will make a target directory of ./solo
 
-loadoptions
 
 target solo-8mbit
-
-uses ARCH
-uses CONFIG_COMPRESS
-uses CONFIG_IOAPIC
-uses CONFIG_ROM_STREAM
-uses CONFIG_ROM_STREAM_START
-uses CONFIG_UDELAY_TSC
-uses CPU_FIXUP
-uses FALLBACK_SIZE
-uses HAVE_FALLBACK_BOOT
-uses HAVE_MP_TABLE
-uses HAVE_PIRQ_TABLE
-uses HAVE_HARD_RESET
-uses i586
-uses i686
-uses INTEL_PPRO_MTRR
-uses HEAP_SIZE
-uses IRQ_SLOT_COUNT
-uses k7
-uses k8
-uses MAINBOARD_PART_NUMBER
-uses MAINBOARD_VENDOR
-uses CONFIG_SMP
-uses CONFIG_MAX_CPUS
-uses MEMORY_HOLE
-uses PAYLOAD_SIZE
-uses _RAMBASE
-uses _ROMBASE
-uses ROM_IMAGE_SIZE
-uses ROM_SECTION_OFFSET
-uses ROM_SECTION_SIZE
-uses ROM_SIZE
-uses STACK_SIZE
-uses USE_FALLBACK_IMAGE
-uses USE_OPTION_TABLE
-uses HAVE_OPTION_TABLE
-uses MAXIMUM_CONSOLE_LOGLEVEL
-uses  DEFAULT_CONSOLE_LOGLEVEL
-uses  CONFIG_CONSOLE_SERIAL8250
-uses MAINBOARD
-uses CONFIG_CHIP_CONFIGURE
-uses XIP_ROM_SIZE
-uses XIP_ROM_BASE
-uses LINUXBIOS_EXTRA_VERSION
-uses CC
-
-option CC="gcc -m32"
-
-option CONFIG_CHIP_CONFIGURE=1
-
-option  MAXIMUM_CONSOLE_LOGLEVEL=8
-option  DEFAULT_CONSOLE_LOGLEVEL=8
-option  CONFIG_CONSOLE_SERIAL8250=1
-
-option CPU_FIXUP=1
-option CONFIG_UDELAY_TSC=0
-option i686=1
-option i586=1
-option INTEL_PPRO_MTRR=1
-option k7=1
-option k8=1
+mainboard amd/solo
 
 option ROM_SIZE=0x100000
 
+romimage "normal"
+	option USE_FALLBACK_IMAGE=0
+	option ROM_IMAGE_SIZE=0x10000
+	option LINUXBIOS_EXTRA_VERSION=".0-Normal"
+	payload /usr/share/LinuxBIOS/kernelpayload.elf
+end
 
-option HAVE_OPTION_TABLE=1
-option CONFIG_ROM_STREAM=1
-option HAVE_FALLBACK_BOOT=1
-
-###
-### Compute the location and size of where this firmware image
-### (linuxBIOS plus bootloader) will live in the boot rom chip.
-###
-option FALLBACK_SIZE=ROM_SIZE
-
-## LinuxBIOS C code runs at this location in RAM
-option _RAMBASE=0x00004000
-
-#
-###
-### Compute the start location and size size of
-### The linuxBIOS bootloader.
-###
-
-romimage "single" 
+romimage "fallback" 
 	option USE_FALLBACK_IMAGE=1
 	option ROM_IMAGE_SIZE=0x10000
-	option LINUXBIOS_EXTRA_VERSION=".0-8MBit"
-	mainboard amd/solo
+	option LINUXBIOS_EXTRA_VERSION=".0-Fallback"
 	payload /usr/share/LinuxBIOS/kernelpayload.elf
 end
 
-buildrom ./linuxbios.rom ROM_SIZE "single"
-
+buildrom ./solo-8mbit.rom ROM_SIZE "normal" "fallback"