Enable CBFS everywhere. All boards compiled for me (abuild tested),

and we will fix issues as they appear.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

25 files changed, 0 insertions, 71 deletions

diff --git a/targets/amd/db800/Config.lb b/targets/amd/db800/Config.lb
index a9230f01bd..967eedb878 100644
--- a/targets/amd/db800/Config.lb
+++ b/targets/amd/db800/Config.lb
@@ -32,7 +32,6 @@ option CONFIG_COMPRESSED_PAYLOAD_LZMA=0
 # Leave 36k for VSA.
 option CONFIG_ROM_SIZE=512*1024-36*1024
 # option CONFIG_ROM_SIZE=256*1024-36*1024
-option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE
 
 option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
 option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
diff --git a/targets/amd/norwich/Config.lb b/targets/amd/norwich/Config.lb
index 5f927c567a..828c507f4a 100644
--- a/targets/amd/norwich/Config.lb
+++ b/targets/amd/norwich/Config.lb
@@ -32,7 +32,6 @@ option CONFIG_COMPRESSED_PAYLOAD_LZMA=0
 
 option CONFIG_ROM_SIZE=512*1024-36*1024
 #option CONFIG_ROM_SIZE=256*1024-36*1024
-option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE
 
 option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
 option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
diff --git a/targets/amd/rumba/Config.nofallback.lb b/targets/amd/rumba/Config.nofallback.lb
index d3c5464882..4e73c3afbb 100644
--- a/targets/amd/rumba/Config.nofallback.lb
+++ b/targets/amd/rumba/Config.nofallback.lb
@@ -5,8 +5,6 @@ target rumba
 mainboard amd/rumba
 
 option CONFIG_ROM_SIZE=128*1024
-option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE
-#option CONFIG_FALLBACK_SIZE=65535
 
 #romimage "normal"
 #	option CONFIG_USE_FALLBACK_IMAGE=0
diff --git a/targets/amd/serengeti_cheetah/Config-abuild.lb b/targets/amd/serengeti_cheetah/Config-abuild.lb
index 683a874ad4..22e527e6d4 100644
--- a/targets/amd/serengeti_cheetah/Config-abuild.lb
+++ b/targets/amd/serengeti_cheetah/Config-abuild.lb
@@ -13,7 +13,6 @@ __LOGLEVEL__
 romimage "normal"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=0
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-normal"
 	payload __PAYLOAD__
 end
@@ -21,7 +20,6 @@ end
 romimage "fallback"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=1
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-fallback"
 	payload __PAYLOAD__
 end
diff --git a/targets/amd/serengeti_cheetah/Config-lab.lb b/targets/amd/serengeti_cheetah/Config-lab.lb
index bcb443bcac..6577672c43 100644
--- a/targets/amd/serengeti_cheetah/Config-lab.lb
+++ b/targets/amd/serengeti_cheetah/Config-lab.lb
@@ -13,7 +13,6 @@ option CONFIG_FAILOVER_SIZE=0
 romimage "fallback"
 	option CONFIG_PRECOMPRESSED_PAYLOAD=1
 	option CONFIG_COMPRESSED_PAYLOAD_LZMA=1
-	option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE
 	option CONFIG_USE_FALLBACK_IMAGE=1
 	option CONFIG_ROM_IMAGE_SIZE=0x1a000
 	option CONFIG_XIP_ROM_SIZE=0x40000
diff --git a/targets/amd/serengeti_cheetah_fam10/Config-lab.lb b/targets/amd/serengeti_cheetah_fam10/Config-lab.lb
index 7cc594cd7d..88c7f54d36 100644
--- a/targets/amd/serengeti_cheetah_fam10/Config-lab.lb
+++ b/targets/amd/serengeti_cheetah_fam10/Config-lab.lb
@@ -31,7 +31,6 @@ mainboard amd/serengeti_cheetah_fam10
 
 # 1024KB ROM
 option CONFIG_ROM_SIZE=1024*1024
-option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE-CONFIG_FAILOVER_SIZE
 
 romimage "fallback"
 	option CONFIG_USE_FAILOVER_IMAGE=0
diff --git a/targets/arima/hdama/Config.kernelimage.lb b/targets/arima/hdama/Config.kernelimage.lb
index bf5c59850c..029b32884e 100644
--- a/targets/arima/hdama/Config.kernelimage.lb
+++ b/targets/arima/hdama/Config.kernelimage.lb
@@ -13,7 +13,6 @@ uses CONFIG_ROM_PAYLOAD
 uses CONFIG_ROM_PAYLOAD_START
 uses CONFIG_UDELAY_TSC
 uses CPU_FIXUP
-uses CONFIG_FALLBACK_SIZE
 uses CONFIG_HAVE_FALLBACK_BOOT
 uses CONFIG_HAVE_MP_TABLE
 uses CONFIG_HAVE_PIRQ_TABLE
@@ -71,12 +70,6 @@ option CONFIG_HAVE_OPTION_TABLE=1
 option CONFIG_ROM_PAYLOAD=1
 option CONFIG_HAVE_FALLBACK_BOOT=1
 
-###
-### Compute the location and size of where this firmware image
-### (coreboot plus bootloader) will live in the boot rom chip.
-###
-option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE
-
 ## Coreboot C code runs at this location in RAM
 option CONFIG_RAMBASE=0x00004000
 
diff --git a/targets/artecgroup/dbe61/Config.lb b/targets/artecgroup/dbe61/Config.lb
index 0cd1ee5710..eaa979c6f5 100644
--- a/targets/artecgroup/dbe61/Config.lb
+++ b/targets/artecgroup/dbe61/Config.lb
@@ -21,8 +21,6 @@ option CONFIG_ROM_SIZE = 1024*512 - 36*1024
 ## not including any payload.
 option CONFIG_ROM_IMAGE_SIZE=64*1024
 
-option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE
-
 option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
 option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
 romimage "fallback" 
diff --git a/targets/asi/mb_5blmp/Config.lb b/targets/asi/mb_5blmp/Config.lb
index 3dfe28a6f7..f57c13d47c 100644
--- a/targets/asi/mb_5blmp/Config.lb
+++ b/targets/asi/mb_5blmp/Config.lb
@@ -23,7 +23,6 @@ mainboard asi/mb_5blmp
 
 option CONFIG_ROM_SIZE = (256 * 1024)
 # option CONFIG_ROM_SIZE = (256 * 1024) - (32 * 1024)
-# option CONFIG_FALLBACK_SIZE = (256 * 1024) - (32 * 1024)
 
 romimage "normal"
 	option CONFIG_USE_FALLBACK_IMAGE = 0
diff --git a/targets/asus/a8n_e/Config-abuild.lb b/targets/asus/a8n_e/Config-abuild.lb
index 683a874ad4..22e527e6d4 100644
--- a/targets/asus/a8n_e/Config-abuild.lb
+++ b/targets/asus/a8n_e/Config-abuild.lb
@@ -13,7 +13,6 @@ __LOGLEVEL__
 romimage "normal"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=0
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-normal"
 	payload __PAYLOAD__
 end
@@ -21,7 +20,6 @@ end
 romimage "fallback"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=1
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-fallback"
 	payload __PAYLOAD__
 end
diff --git a/targets/asus/m2v-mx_se/Config-abuild.lb b/targets/asus/m2v-mx_se/Config-abuild.lb
index 08115a7047..07c6ebd34f 100644
--- a/targets/asus/m2v-mx_se/Config-abuild.lb
+++ b/targets/asus/m2v-mx_se/Config-abuild.lb
@@ -35,15 +35,6 @@ option CONFIG_ROM_SIZE = 512 * 1024
 ## CONFIG_ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image,
 ## not including any payload.
 
-# Please note that 128KB is cached for (XIP) too
-
-option CONFIG_ROM_IMAGE_SIZE = 128 * 1024
-
-## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image 
-## (including payload) will use.
-
-option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE
-
 romimage "fallback"
 	option CONFIG_USE_FALLBACK_IMAGE=1
 	payload __PAYLOAD__
diff --git a/targets/asus/m2v-mx_se/Config.lb b/targets/asus/m2v-mx_se/Config.lb
index b091732bdb..4183543be7 100644
--- a/targets/asus/m2v-mx_se/Config.lb
+++ b/targets/asus/m2v-mx_se/Config.lb
@@ -41,11 +41,6 @@ option CONFIG_ROM_SIZE = 512 * 1024
 
 option CONFIG_ROM_IMAGE_SIZE = 128 * 1024
 
-## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image 
-## (including payload) will use.
-
-option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE
-
 romimage "fallback"
 	option CONFIG_USE_FALLBACK_IMAGE=1
 	payload ../payload.elf
diff --git a/targets/digitallogic/msm586seg/Config-abuild.lb b/targets/digitallogic/msm586seg/Config-abuild.lb
index a6b1ddcad5..7193da1677 100644
--- a/targets/digitallogic/msm586seg/Config-abuild.lb
+++ b/targets/digitallogic/msm586seg/Config-abuild.lb
@@ -9,9 +9,7 @@ __COMPRESSION__
 __LOGLEVEL__
 
 romimage "fallback" 
-	option CONFIG_FALLBACK_SIZE = 256 * 1024
 	option CONFIG_USE_FALLBACK_IMAGE=1
-	option CONFIG_ROM_IMAGE_SIZE= 128 * 1024
 	option COREBOOT_EXTRA_VERSION=".0Fallback"
 	payload __PAYLOAD__
 end
diff --git a/targets/gigabyte/ga_2761gxdk/Config-abuild.lb b/targets/gigabyte/ga_2761gxdk/Config-abuild.lb
index fd3fa4822b..d946796d19 100644
--- a/targets/gigabyte/ga_2761gxdk/Config-abuild.lb
+++ b/targets/gigabyte/ga_2761gxdk/Config-abuild.lb
@@ -34,8 +34,6 @@ option CONFIG_ROM_SIZE = 512*1024
 romimage "normal"
         option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=0
-	option CONFIG_ROM_IMAGE_SIZE=0x28000
-	option CONFIG_XIP_ROM_SIZE=0x40000
 	option COREBOOT_EXTRA_VERSION=".0-Normal"
 	payload __PAYLOAD__
 end
@@ -43,8 +41,6 @@ end
 romimage "fallback" 
         option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=1
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
-	option CONFIG_XIP_ROM_SIZE=0x40000
 	option COREBOOT_EXTRA_VERSION=".0-Fallback"
 	payload __PAYLOAD__
 end
diff --git a/targets/gigabyte/m57sli/Config-abuild.lb b/targets/gigabyte/m57sli/Config-abuild.lb
index 683a874ad4..22e527e6d4 100644
--- a/targets/gigabyte/m57sli/Config-abuild.lb
+++ b/targets/gigabyte/m57sli/Config-abuild.lb
@@ -13,7 +13,6 @@ __LOGLEVEL__
 romimage "normal"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=0
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-normal"
 	payload __PAYLOAD__
 end
@@ -21,7 +20,6 @@ end
 romimage "fallback"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=1
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-fallback"
 	payload __PAYLOAD__
 end
diff --git a/targets/iei/juki-511p/Config-abuild.lb b/targets/iei/juki-511p/Config-abuild.lb
index 7ad4c05735..0f6d5da2be 100644
--- a/targets/iei/juki-511p/Config-abuild.lb
+++ b/targets/iei/juki-511p/Config-abuild.lb
@@ -9,22 +9,15 @@ __COMPRESSION__
 __LOGLEVEL__
 
 option CONFIG_ROM_SIZE=256*1024
-###
-### Compute the location and size of where this firmware image
-### (coreboot plus bootloader) will live in the boot rom chip.
-###
-option CONFIG_FALLBACK_SIZE=128*1024
 
 romimage "normal"
 	option CONFIG_USE_FALLBACK_IMAGE=0
-	option CONFIG_ROM_IMAGE_SIZE=64*1024
 	option COREBOOT_EXTRA_VERSION=".0-Normal"
 	payload __PAYLOAD__
 end
 
 romimage "fallback" 
 	option CONFIG_USE_FALLBACK_IMAGE=1
-	option CONFIG_ROM_IMAGE_SIZE=64*1024
 	option COREBOOT_EXTRA_VERSION=".0-Fallback"
 	payload __PAYLOAD__
 end
diff --git a/targets/iwill/dk8_htx/Config-abuild.lb b/targets/iwill/dk8_htx/Config-abuild.lb
index 683a874ad4..22e527e6d4 100644
--- a/targets/iwill/dk8_htx/Config-abuild.lb
+++ b/targets/iwill/dk8_htx/Config-abuild.lb
@@ -13,7 +13,6 @@ __LOGLEVEL__
 romimage "normal"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=0
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-normal"
 	payload __PAYLOAD__
 end
@@ -21,7 +20,6 @@ end
 romimage "fallback"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=1
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-fallback"
 	payload __PAYLOAD__
 end
diff --git a/targets/msi/ms7135/Config-abuild.lb b/targets/msi/ms7135/Config-abuild.lb
index 683a874ad4..22e527e6d4 100644
--- a/targets/msi/ms7135/Config-abuild.lb
+++ b/targets/msi/ms7135/Config-abuild.lb
@@ -13,7 +13,6 @@ __LOGLEVEL__
 romimage "normal"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=0
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-normal"
 	payload __PAYLOAD__
 end
@@ -21,7 +20,6 @@ end
 romimage "fallback"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=1
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-fallback"
 	payload __PAYLOAD__
 end
diff --git a/targets/msi/ms7260/Config-abuild.lb b/targets/msi/ms7260/Config-abuild.lb
index 988e33b351..ab9568fe7f 100644
--- a/targets/msi/ms7260/Config-abuild.lb
+++ b/targets/msi/ms7260/Config-abuild.lb
@@ -31,8 +31,6 @@ __LOGLEVEL__
 romimage "normal"
 	option CONFIG_USE_FAILOVER_IMAGE = 0
 	option CONFIG_USE_FALLBACK_IMAGE = 0
-	option CONFIG_ROM_IMAGE_SIZE = 128 * 1024
-	option CONFIG_XIP_ROM_SIZE = 256 * 1024
 	option COREBOOT_EXTRA_VERSION = ".0Normal"
 	payload __PAYLOAD__
 end
@@ -40,8 +38,6 @@ end
 romimage "fallback"
 	option CONFIG_USE_FAILOVER_IMAGE = 0
 	option CONFIG_USE_FALLBACK_IMAGE = 1
-	option CONFIG_ROM_IMAGE_SIZE = 128 * 1024
-	option CONFIG_XIP_ROM_SIZE = 256 * 1024
 	option COREBOOT_EXTRA_VERSION = ".0Fallback"
 	payload __PAYLOAD__
 end
diff --git a/targets/nvidia/l1_2pvv/Config-abuild.lb b/targets/nvidia/l1_2pvv/Config-abuild.lb
index 683a874ad4..22e527e6d4 100644
--- a/targets/nvidia/l1_2pvv/Config-abuild.lb
+++ b/targets/nvidia/l1_2pvv/Config-abuild.lb
@@ -13,7 +13,6 @@ __LOGLEVEL__
 romimage "normal"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=0
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-normal"
 	payload __PAYLOAD__
 end
@@ -21,7 +20,6 @@ end
 romimage "fallback"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=1
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-fallback"
 	payload __PAYLOAD__
 end
diff --git a/targets/supermicro/h8dme/Config-abuild.lb b/targets/supermicro/h8dme/Config-abuild.lb
index 11a2ae53e5..76ff76613c 100644
--- a/targets/supermicro/h8dme/Config-abuild.lb
+++ b/targets/supermicro/h8dme/Config-abuild.lb
@@ -13,7 +13,6 @@ __LOGLEVEL__
 romimage "normal"
         option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=0
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-normal"
 	payload __PAYLOAD__
 end
@@ -21,7 +20,6 @@ end
 romimage "fallback"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=1
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-fallback"
 	payload __PAYLOAD__
 end
diff --git a/targets/technologic/ts5300/Config-abuild.lb b/targets/technologic/ts5300/Config-abuild.lb
index 82566654e7..5ae820b115 100644
--- a/targets/technologic/ts5300/Config-abuild.lb
+++ b/targets/technologic/ts5300/Config-abuild.lb
@@ -9,9 +9,7 @@ __COMPRESSION__
 __LOGLEVEL__
 
 romimage "fallback" 
-	option CONFIG_FALLBACK_SIZE = 256 * 1024
 	option CONFIG_USE_FALLBACK_IMAGE=1
-	option CONFIG_ROM_IMAGE_SIZE=128 * 1024 # 0x10000
 	option COREBOOT_EXTRA_VERSION=".0-Fallback"
 	payload __PAYLOAD__
 end
diff --git a/targets/tyan/s2895/Config-abuild.lb b/targets/tyan/s2895/Config-abuild.lb
index 683a874ad4..22e527e6d4 100644
--- a/targets/tyan/s2895/Config-abuild.lb
+++ b/targets/tyan/s2895/Config-abuild.lb
@@ -13,7 +13,6 @@ __LOGLEVEL__
 romimage "normal"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=0
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-normal"
 	payload __PAYLOAD__
 end
@@ -21,7 +20,6 @@ end
 romimage "fallback"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=1
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-fallback"
 	payload __PAYLOAD__
 end
diff --git a/targets/tyan/s2912/Config-abuild.lb b/targets/tyan/s2912/Config-abuild.lb
index 683a874ad4..22e527e6d4 100644
--- a/targets/tyan/s2912/Config-abuild.lb
+++ b/targets/tyan/s2912/Config-abuild.lb
@@ -13,7 +13,6 @@ __LOGLEVEL__
 romimage "normal"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=0
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-normal"
 	payload __PAYLOAD__
 end
@@ -21,7 +20,6 @@ end
 romimage "fallback"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=1
-	option CONFIG_ROM_IMAGE_SIZE=0x20000
 	option COREBOOT_EXTRA_VERSION=".0-fallback"
 	payload __PAYLOAD__
 end
diff --git a/targets/tyan/s2912_fam10/Config-abuild.lb b/targets/tyan/s2912_fam10/Config-abuild.lb
index 36284fcb0c..2ec827d3d8 100644
--- a/targets/tyan/s2912_fam10/Config-abuild.lb
+++ b/targets/tyan/s2912_fam10/Config-abuild.lb
@@ -31,8 +31,6 @@ __LOGLEVEL__
 romimage "normal"
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=0
-	option CONFIG_ROM_IMAGE_SIZE=0x34000
-	option CONFIG_XIP_ROM_SIZE=0x40000
 	option COREBOOT_EXTRA_VERSION=".0-Normal"
 	payload __PAYLOAD__
 end
@@ -40,8 +38,6 @@ end
 romimage "fallback" 
 	option CONFIG_USE_FAILOVER_IMAGE=0
 	option CONFIG_USE_FALLBACK_IMAGE=1
-	option CONFIG_ROM_IMAGE_SIZE=0x34000
-	option CONFIG_XIP_ROM_SIZE=0x40000
 	option COREBOOT_EXTRA_VERSION=".0-Fallback"
 	payload __PAYLOAD__
 end