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authorUwe Hermann <uwe@hermann-uwe.de>2008-11-19 13:42:14 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2008-11-19 13:42:14 +0000
commit86c9b8839217675cb1cc4830aa7d758864ee43f9 (patch)
tree3e66948c84653ea05bff591a34f8ac66ed414fd6 /targets
parentf31ca16793ca2898e5983a12bdd706bfdd0d0efe (diff)
downloadcoreboot-86c9b8839217675cb1cc4830aa7d758864ee43f9.tar.xz
Coding-style and whitespace fixes (also to make the code more similar
the Lippert Cool SpaceRunner LX which is already in svn). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3761 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets')
-rw-r--r--targets/lippert/roadrunner-lx/Config.lb32
1 files changed, 16 insertions, 16 deletions
diff --git a/targets/lippert/roadrunner-lx/Config.lb b/targets/lippert/roadrunner-lx/Config.lb
index 9be81e4638..0d01da8652 100644
--- a/targets/lippert/roadrunner-lx/Config.lb
+++ b/targets/lippert/roadrunner-lx/Config.lb
@@ -25,24 +25,24 @@ target roadrunner-lx
mainboard lippert/roadrunner-lx
# HACK to get the right TSC support.
-option CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
+option CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
-option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0
-option CONFIG_COMPRESSED_PAYLOAD_LZMA=0
+option CONFIG_COMPRESSED_PAYLOAD_NRV2B = 0
+option CONFIG_COMPRESSED_PAYLOAD_LZMA = 0
## Load payload (e.g. Linux) from IDE.
-#option CONFIG_ROM_PAYLOAD=0
-#option CONFIG_IDE=1
-#option CONFIG_FS_PAYLOAD=1
-#option CONFIG_FS_EXT2=1
-#option AUTOBOOT_DELAY=0
-#option AUTOBOOT_CMDLINE="hda1:/payload.elf"
+#option CONFIG_ROM_PAYLOAD = 0
+#option CONFIG_IDE = 1
+#option CONFIG_FS_PAYLOAD = 1
+#option CONFIG_FS_EXT2 = 1
+#option AUTOBOOT_DELAY = 0
+#option AUTOBOOT_CMDLINE = "hda1:/payload.elf"
# Leave 36k for VSA. Usually board is equipped with a 512 KB FWH (LPC) flash,
# however it can be replaced with a 1 MB chip.
-option ROM_SIZE=512*1024-36*1024
-#option ROM_SIZE=1024*1024-36*1024
-option FALLBACK_SIZE=ROM_SIZE
+option ROM_SIZE = (512 * 1024) - (36 * 1024)
+#option ROM_SIZE = (1024 * 1024) - (36 * 1024)
+option FALLBACK_SIZE = ROM_SIZE
#option DEFAULT_CONSOLE_LOGLEVEL = 4
#option MAXIMUM_CONSOLE_LOGLEVEL = 4
@@ -51,12 +51,12 @@ option FALLBACK_SIZE=ROM_SIZE
option CONFIG_COMPRESS = 1
romimage "image"
- option USE_FALLBACK_IMAGE=1
- option ROM_IMAGE_SIZE=64*1024
- option COREBOOT_EXTRA_VERSION=".0"
+ option USE_FALLBACK_IMAGE = 1
+ option ROM_IMAGE_SIZE = 64 * 1024
+ option COREBOOT_EXTRA_VERSION = ".0"
payload ../payload.elf
# If getting payload from IDE
- #payload /dev/null
+ # payload /dev/null
end
buildrom ./coreboot.rom ROM_SIZE "image"