diff options
author | Myles Watson <mylesgw@gmail.com> | 2009-05-12 14:14:54 +0000 |
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committer | Myles Watson <mylesgw@gmail.com> | 2009-05-12 14:14:54 +0000 |
commit | 019b5f4230c8cbccbe0d513fe19eae43ea4c2d16 (patch) | |
tree | d9b08f93da42ac142ba55663ee8291659b1db254 /targets | |
parent | 8d272486821c43af37f476838e6eaf657015cd34 (diff) | |
download | coreboot-019b5f4230c8cbccbe0d513fe19eae43ea4c2d16.tar.xz |
I guess a couple of function calls pushed these boards over the 0x1700 edge on
the build server.
Add Config-abuild.lb to fix s2892 & s2891.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4274 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets')
-rw-r--r-- | targets/tyan/s2891/Config-abuild.lb | 27 | ||||
-rw-r--r-- | targets/tyan/s2892/Config-abuild.lb | 27 |
2 files changed, 54 insertions, 0 deletions
diff --git a/targets/tyan/s2891/Config-abuild.lb b/targets/tyan/s2891/Config-abuild.lb new file mode 100644 index 0000000000..95f4366ab1 --- /dev/null +++ b/targets/tyan/s2891/Config-abuild.lb @@ -0,0 +1,27 @@ +# This will make a target directory of ./VENDOR_MAINBOARD + +target VENDOR_MAINBOARD +mainboard VENDOR/MAINBOARD + +option CC="CROSSCC" +option CROSS_COMPILE="CROSS_PREFIX" +option HOSTCC="CROSS_HOSTCC" + +__COMPRESSION__ +__LOGLEVEL__ + +romimage "normal" + option USE_FALLBACK_IMAGE=0 + option ROM_IMAGE_SIZE=0x20000 + option COREBOOT_EXTRA_VERSION=".0-normal" + payload __PAYLOAD__ +end + +romimage "fallback" + option USE_FALLBACK_IMAGE=1 + option ROM_IMAGE_SIZE=0x20000 + option COREBOOT_EXTRA_VERSION=".0-fallback" + payload __PAYLOAD__ +end + +buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2892/Config-abuild.lb b/targets/tyan/s2892/Config-abuild.lb new file mode 100644 index 0000000000..95f4366ab1 --- /dev/null +++ b/targets/tyan/s2892/Config-abuild.lb @@ -0,0 +1,27 @@ +# This will make a target directory of ./VENDOR_MAINBOARD + +target VENDOR_MAINBOARD +mainboard VENDOR/MAINBOARD + +option CC="CROSSCC" +option CROSS_COMPILE="CROSS_PREFIX" +option HOSTCC="CROSS_HOSTCC" + +__COMPRESSION__ +__LOGLEVEL__ + +romimage "normal" + option USE_FALLBACK_IMAGE=0 + option ROM_IMAGE_SIZE=0x20000 + option COREBOOT_EXTRA_VERSION=".0-normal" + payload __PAYLOAD__ +end + +romimage "fallback" + option USE_FALLBACK_IMAGE=1 + option ROM_IMAGE_SIZE=0x20000 + option COREBOOT_EXTRA_VERSION=".0-fallback" + payload __PAYLOAD__ +end + +buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" |