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| author | Felix Held <felix-coreboot@felixheld.de> | 2021-02-17 00:32:46 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-02-18 01:17:19 +0000 |
| commit | a2642d0ffe3ecba201a0bfe6b219e35b52c399ae (patch) | |
| tree | eab9680b156202134e0ad322c64970b32877722b /tests | |
| parent | b284013065aff4f20890b0422444c9022cb54e7c (diff) | |
| download | coreboot-a2642d0ffe3ecba201a0bfe6b219e35b52c399ae.tar.xz | |
Revert "soc/amd: Add option to select if SOC supports ESPI sub decode"
This reverts commit 64d0ad347b5c9c698547f0ff15779e88a10014f4. In the
current revision 3.001 of the PPR #56569 the register exists and the bit
definitions match.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ie7a97843c3dac897f79f229b660b7e30b34eef93
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50824
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'tests')
0 files changed, 0 insertions, 0 deletions