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authorJakub Czapiga <jacz@semihalf.com>2021-04-08 16:29:03 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-04-15 07:38:05 +0000
commitdadcae63c6c407ab8e14a3e1b10119da63d2228c (patch)
treefff2f773249bdd2115a49ec3770dabaa11790a9d /tests
parente73bae7b0a0164a02eb89b2e42c81aebfb7d411e (diff)
downloadcoreboot-dadcae63c6c407ab8e14a3e1b10119da63d2228c.tar.xz
tests: Add lib/dimm_info_util-test test case
Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: I536566ba883bbeb558587a8d71e3d86152fb5e14 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52192 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'tests')
-rw-r--r--tests/lib/Makefile.inc5
-rw-r--r--tests/lib/dimm_info_util-test.c112
2 files changed, 117 insertions, 0 deletions
diff --git a/tests/lib/Makefile.inc b/tests/lib/Makefile.inc
index 3a43a640bc..ee2bf5ab82 100644
--- a/tests/lib/Makefile.inc
+++ b/tests/lib/Makefile.inc
@@ -25,6 +25,7 @@ tests-y += compute_ip_checksum-test
tests-y += memrange-test
tests-y += uuid-test
tests-y += bootmem-test
+tests-y += dimm_info_util-test
string-test-srcs += tests/lib/string-test.c
string-test-srcs += src/lib/string.c
@@ -124,3 +125,7 @@ bootmem-test-srcs += src/device/device_util.c
bootmem-test-srcs += src/lib/bootmem.c
bootmem-test-srcs += src/lib/memrange.c
+dimm_info_util-test-srcs += tests/lib/dimm_info_util-test.c
+dimm_info_util-test-srcs += src/lib/dimm_info_util.c
+dimm_info_util-test-srcs += tests/stubs/console.c
+
diff --git a/tests/lib/dimm_info_util-test.c b/tests/lib/dimm_info_util-test.c
new file mode 100644
index 0000000000..a698fc51c2
--- /dev/null
+++ b/tests/lib/dimm_info_util-test.c
@@ -0,0 +1,112 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <dimm_info_util.h>
+#include <spd.h>
+#include <tests/test.h>
+
+static void test_smbios_bus_width_to_spd_width(void **state)
+{
+ /* Non-ECC variants */
+ assert_int_equal(MEMORY_BUS_WIDTH_64, smbios_bus_width_to_spd_width(64, 64));
+ assert_int_equal(MEMORY_BUS_WIDTH_32, smbios_bus_width_to_spd_width(32, 32));
+ assert_int_equal(MEMORY_BUS_WIDTH_16, smbios_bus_width_to_spd_width(16, 16));
+ assert_int_equal(MEMORY_BUS_WIDTH_8, smbios_bus_width_to_spd_width(8, 8));
+ /* Incorrect data width. Fallback to 8-bit */
+ assert_int_equal(MEMORY_BUS_WIDTH_8, smbios_bus_width_to_spd_width(15, 15));
+
+ /* ECC variants */
+ assert_int_equal(MEMORY_BUS_WIDTH_64 | SPD_ECC_8BIT,
+ smbios_bus_width_to_spd_width(64 + 8, 64));
+ assert_int_equal(MEMORY_BUS_WIDTH_32 | SPD_ECC_8BIT,
+ smbios_bus_width_to_spd_width(32 + 8, 32));
+ assert_int_equal(MEMORY_BUS_WIDTH_16 | SPD_ECC_8BIT,
+ smbios_bus_width_to_spd_width(16 + 8, 16));
+ assert_int_equal(MEMORY_BUS_WIDTH_8 | SPD_ECC_8BIT,
+ smbios_bus_width_to_spd_width(8 + 8, 8));
+ /* Incorrect data width. Fallback to 8-bit */
+ assert_int_equal(MEMORY_BUS_WIDTH_8 | SPD_ECC_8BIT,
+ smbios_bus_width_to_spd_width(15 + 8, 15));
+}
+
+static void test_smbios_memory_size_to_mib(void **state)
+{
+ uint32_t extended_size;
+ uint16_t memory_size;
+
+ /* Unknown memory size */
+ assert_int_equal(0, smbios_memory_size_to_mib(0xFFFF, 0));
+ assert_int_equal(0, smbios_memory_size_to_mib(0xFFFF, 0xFFFF));
+ assert_int_equal(0, smbios_memory_size_to_mib(0xFFFF, 87642));
+
+ /* 32GiB - 1MiB */
+ extended_size = 0;
+ assert_int_equal(extended_size, smbios_memory_size_to_mib(0x7FFF, extended_size));
+ extended_size = 0xFFFFFFFF;
+ assert_int_equal(extended_size, smbios_memory_size_to_mib(0x7FFF, extended_size));
+ extended_size = 0xDEDE6666;
+ assert_int_equal(extended_size, smbios_memory_size_to_mib(0x7FFF, extended_size));
+
+ /* Memory size in KiB when MSB is flipped */
+ memory_size = 0x0 & 0x8000; /* Zero bytes */
+ assert_int_equal(0, smbios_memory_size_to_mib(memory_size, 0));
+ assert_int_equal(0, smbios_memory_size_to_mib(memory_size, 0xFFFFFFFF));
+ assert_int_equal(0, smbios_memory_size_to_mib(memory_size, 2345568));
+ memory_size = (31 * KiB) | 0x8000;
+ assert_int_equal(31, smbios_memory_size_to_mib(memory_size, 0));
+ assert_int_equal(31, smbios_memory_size_to_mib(memory_size, 0xFFFFFFFF));
+ assert_int_equal(31, smbios_memory_size_to_mib(memory_size, 72594344));
+
+ /* Value in MiB Only when memory size is not 0xFFFF and 0x7FFF and MSB is not set */
+ memory_size = 32766; /* value in MiB */
+ assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 0));
+ assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 0xFFFFFFFF));
+ assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 694735));
+}
+
+static void test_smbios_form_factor_to_spd_mod_type(void **state)
+{
+ /* Form factors defined in coreboot */
+ const LargestIntegralType udimm_allowed[] = {
+ SPD_UDIMM, SPD_MICRO_DIMM, SPD_MINI_UDIMM,
+ };
+ assert_in_set(smbios_form_factor_to_spd_mod_type(MEMORY_FORMFACTOR_DIMM),
+ udimm_allowed, ARRAY_SIZE(udimm_allowed));
+
+ const LargestIntegralType rdimm_allowed[] = { SPD_RDIMM, SPD_MINI_RDIMM };
+ assert_in_set(smbios_form_factor_to_spd_mod_type(MEMORY_FORMFACTOR_RIMM),
+ rdimm_allowed, ARRAY_SIZE(rdimm_allowed));
+
+ assert_int_equal(SPD_SODIMM,
+ smbios_form_factor_to_spd_mod_type(MEMORY_FORMFACTOR_SODIMM));
+
+ const smbios_memory_form_factor undefined_factors[] = {
+ MEMORY_FORMFACTOR_OTHER,
+ MEMORY_FORMFACTOR_UNKNOWN,
+ MEMORY_FORMFACTOR_SIMM,
+ MEMORY_FORMFACTOR_SIP,
+ MEMORY_FORMFACTOR_CHIP,
+ MEMORY_FORMFACTOR_DIP,
+ MEMORY_FORMFACTOR_ZIP,
+ MEMORY_FORMFACTOR_PROPRIETARY_CARD,
+ MEMORY_FORMFACTOR_TSOP,
+ MEMORY_FORMFACTOR_ROC,
+ MEMORY_FORMFACTOR_SRIMM,
+ MEMORY_FORMFACTOR_FBDIMM,
+ MEMORY_FORMFACTOR_DIE,
+ };
+ for (int i = 0; i < ARRAY_SIZE(undefined_factors); ++i) {
+ assert_int_equal(SPD_UNDEFINED,
+ smbios_form_factor_to_spd_mod_type(undefined_factors[i]));
+ }
+}
+
+int main(void)
+{
+ const struct CMUnitTest tests[] = {
+ cmocka_unit_test(test_smbios_bus_width_to_spd_width),
+ cmocka_unit_test(test_smbios_memory_size_to_mib),
+ cmocka_unit_test(test_smbios_form_factor_to_spd_mod_type),
+ };
+
+ return cmocka_run_group_tests(tests, NULL, NULL);
+}