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| author | Aaron Durbin <adurbin@chromium.org> | 2014-11-05 10:48:16 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-10 11:57:09 +0200 |
| commit | be3e2387c6e01cf5dd2346aa0f12e35d8229f2a6 (patch) | |
| tree | c2089ddeabf73413b2e0a2d657f619e5d54fc774 /toolchain.inc | |
| parent | f793d432b9ef562c1a609261faf627d5936d9331 (diff) | |
| download | coreboot-be3e2387c6e01cf5dd2346aa0f12e35d8229f2a6.tar.xz | |
arm64: secmon: prepare for passing more state into secmon
The current implementation of secmon assumes just entry/arg
are passed to secmon for starting up a CPU. That's lacking
in flexibility. Therefore change secmon_params to contain
both the BSP and secondary CPUs' entry/arg information.
That way more information can be added to secmon_params when
needed.
BUG=chrome-os-partner:32112
BRANCH=None
TEST=Built and booted SMP kernel using PSCI and spin table.
Change-Id: I84c478ccefdfa4580fcc078a2491f49f86a9757a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c5fb5bd857a4318174f5b9b48e28406e60a466f8
Original-Change-Id: Iafb82d5cabc806b6625799a6b3dff8d77bdb27e9
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/227548
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9395
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'toolchain.inc')
0 files changed, 0 insertions, 0 deletions