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authorSubrata Banik <subrata.banik@intel.com>2020-10-14 21:53:59 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-10-16 04:02:32 +0000
commitbf38d58420340faac5acf595120c6bca35175ffe (patch)
tree2eb5a45cec93fedc1dd04ecc3e6f2c5ac8785fbb /toolchain.inc
parente0ce60c744f0ebea16bd6a1665f23ccf4461c7c3 (diff)
downloadcoreboot-bf38d58420340faac5acf595120c6bca35175ffe.tar.xz
mb/intel/adlrvp: Program GPIO for M.2 PCH SSD
This patch programs GPIO for PCH SSD Power Enable (GPP_D16) and Port Detect (GPP_A12) as per schematics. TEST=Able to build and boot ADL RVP. Change-Id: I015e46bdf25437c6b196deb3e610bc1b58726070 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46417 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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