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authorXavi Drudis Ferran <xdrudis@tinet.cat>2011-02-28 03:53:47 +0000
committerMarc Jones <marc.jones@amd.com>2011-02-28 03:53:47 +0000
commit061c89e15d336b92b1e9fb2f9866c32f6496fb09 (patch)
tree77f900112cd766b4519a8d978247b412dad22863 /util/abuild
parentc3132105bdd35ba174cd0938847ebf292e2eda26 (diff)
downloadcoreboot-061c89e15d336b92b1e9fb2f9866c32f6496fb09.tar.xz
Improving BKDG implementation of P-states,
CPU and northbridge frequency and voltage handling for Fam 10 in SVI mode. I don't understand what this was doing nor find docs for these regs Maybe it was left over from some copy & paste ? Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6409 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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