diff options
author | Werner Zeh <werner.zeh@siemens.com> | 2016-09-05 07:40:29 +0200 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-09-06 21:17:59 +0200 |
commit | bd366ab4852adcb3734087af952e9b361e5c8bf9 (patch) | |
tree | 0960957cb0c044cca2926fca513bda334f8c6d25 /util/amdtools/example_input | |
parent | 994d8b4f131dd633b4f65136dfa3dad1c101958e (diff) | |
download | coreboot-bd366ab4852adcb3734087af952e9b361e5c8bf9.tar.xz |
fsp_baytrail: Refactor code for SPI debug messages
Use the config switch CONFIG_DEBUG_SPI_FLASH on compiler level rather
then on preprocessor level to ensure that the code is compiled even if
the switch is not selected. In addition the following two changes are
introduced:
1. Prepend the debug messages with 'SPI:' to make the output more
meaningful.
2. Change the address mask from 0xffff to 0x3ff and remove the subtraction
of the constant value 0xf020 in order to print only the register
offset within the SPI controller and avoid the visibility of any
fragments from SPI base address.
3. Switch to uint8_t and friends instead of u8 to sync up with other
code in the same file.
Change-Id: Iaf46f29a775039007a402fe862839df06a4cbfaa
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/16499
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'util/amdtools/example_input')
0 files changed, 0 insertions, 0 deletions