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author | Stefan Reinauer <reinauer@chromium.org> | 2012-03-30 15:06:04 -0700 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-06 21:22:22 +0200 |
commit | 8198600b0b71b474ac8ec75248d5dd916a2713ae (patch) | |
tree | 855b2901d3dfc47d1eccfcb337ae4bd2bbca002e /util/amdtools/k8-read-mem-settings.sh | |
parent | 2bdfb48b13ab5c392ef2b1dd9a8bfda6c90b2e18 (diff) | |
download | coreboot-8198600b0b71b474ac8ec75248d5dd916a2713ae.tar.xz |
Add support for SMSC LPC47N207 SuperI/O chip
This includes only early serial support for now.
Change-Id: I9a2a439e1d17a989428033fdb4a4b813553dab6d
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/823
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'util/amdtools/k8-read-mem-settings.sh')
0 files changed, 0 insertions, 0 deletions