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authorAngel Pons <th3fanbus@gmail.com>2020-05-29 00:42:15 +0200
committerFelix Held <felix-coreboot@felixheld.de>2020-06-15 22:49:23 +0000
commitd71754d1b9ba5bb347a9acf10c9233b405f0121d (patch)
tree0ce25335903946e7405071d21d5731c39842fbcf /util/autoport/sandybridge.go
parenta202aec5fdba27f1f8ec00f9b39007f7600acbb6 (diff)
downloadcoreboot-d71754d1b9ba5bb347a9acf10c9233b405f0121d.tar.xz
sandybridge boards: Factor out MAX_CPUS
Also update autoport accordingly. Change-Id: I12481363cf0e7afc54e2e339504f70632e8d72e2 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41839 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/autoport/sandybridge.go')
-rw-r--r--util/autoport/sandybridge.go2
1 files changed, 0 insertions, 2 deletions
diff --git a/util/autoport/sandybridge.go b/util/autoport/sandybridge.go
index 6f57847a1d..68cbe68134 100644
--- a/util/autoport/sandybridge.go
+++ b/util/autoport/sandybridge.go
@@ -89,8 +89,6 @@ func (i sandybridgemc) Scan(ctx Context, addr PCIDevData) {
KconfigBool["HAVE_ACPI_TABLES"] = true
KconfigBool["HAVE_ACPI_RESUME"] = true
- KconfigInt["MAX_CPUS"] = 8
-
DSDTIncludes = append(DSDTIncludes, DSDTInclude{
File: "cpu/intel/common/acpi/cpu.asl",
})