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authorAngel Pons <th3fanbus@gmail.com>2020-03-05 00:32:02 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-06 18:45:46 +0000
commit447e33965671450b385b5bec70e5febc10ec9186 (patch)
tree581451ba9ebbd98136b3f140b3825b370846f9b6 /util/autoport
parentd3b4de7bea6aafa351a60aa8070af577fe2705eb (diff)
downloadcoreboot-447e33965671450b385b5bec70e5febc10ec9186.tar.xz
util/autoport: Remove redundant comment
Nobody needs "LPC bridge PCI-LPC bridge". Change-Id: Iac833d4fa34b00d89bdfc9aeb06a96583840b900 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39298 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'util/autoport')
-rw-r--r--util/autoport/bd82x6x.go2
1 files changed, 1 insertions, 1 deletions
diff --git a/util/autoport/bd82x6x.go b/util/autoport/bd82x6x.go
index 3ad212b343..87e7584743 100644
--- a/util/autoport/bd82x6x.go
+++ b/util/autoport/bd82x6x.go
@@ -277,7 +277,7 @@ func (b bd82x6x) Scan(ctx Context, addr PCIDevData) {
}
PutPCIChip(addr, cur)
- PutPCIDevParent(addr, "PCI-LPC bridge", "lpc")
+ PutPCIDevParent(addr, "", "lpc")
DSDTIncludes = append(DSDTIncludes, DSDTInclude{
File: "southbridge/intel/common/acpi/platform.asl",