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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-10-03 13:20:26 -0700
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-10-03 22:23:24 +0000
commitfb50124d22014742b6990a95df87a7a828e891b6 (patch)
tree2de7958eedfd8b2ce34f148af251ad6ce13930e4 /util/board_status
parentecf2eb463faff04ab6061eb5dfd8da26c5026a97 (diff)
downloadcoreboot-fb50124d22014742b6990a95df87a7a828e891b6.tar.xz
Remove sandybridge and ivybridge FSP code path
We already have two other code paths for this silicon. Maintaining the FSP path as well doesn't make much sense. There was only one board to use this code, and it's a reference board that I doubt anyone still owns or uses. Change-Id: I4fcfa6c56448416624fd26418df19b354eb72f39 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/11789 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
Diffstat (limited to 'util/board_status')
-rwxr-xr-xutil/board_status/to-wiki/towiki.sh2
1 files changed, 1 insertions, 1 deletions
diff --git a/util/board_status/to-wiki/towiki.sh b/util/board_status/to-wiki/towiki.sh
index c1d2394a63..6aea58aba3 100755
--- a/util/board_status/to-wiki/towiki.sh
+++ b/util/board_status/to-wiki/towiki.sh
@@ -326,7 +326,7 @@ EOF
case $northbridge in
INTEL_HASWELL)
cpu_nice="Intel® 4th Gen (Haswell) Core i3/i5/i7";;
- INTEL_IVYBRIDGE|INTEL_IVYBRIDGE_MRC|INTEL_FSP_IVYBRIDGE)
+ INTEL_IVYBRIDGE|INTEL_IVYBRIDGE_MRC)
cpu_nice="Intel® 3rd Gen (Ivybridge) Core i3/i5/i7";;
INTEL_SANDYBRIDGE|INTEL_SANDYBRIDGE_MRC)
cpu_nice="Intel® 2nd Gen (Sandybridge) Core i3/i5/i7";;