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authorVladimir Serbinenko <phcoder@gmail.com>2014-08-16 17:16:20 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-09-13 20:22:18 +0200
commitf4ea9b2551214d5b4cf9ac528c227f2242815383 (patch)
tree4607db0571c26499b26c752ace65c8454417a813 /util/board_status
parenta71bdc318195b864c427cddc60e69a6145a8ab28 (diff)
downloadcoreboot-f4ea9b2551214d5b4cf9ac528c227f2242815383.tar.xz
towiki.sh: Rename GM45 slot and cpu to correct ones.
Change-Id: Idc8135911549ac39c28932065897ca6643c13656 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6690 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'util/board_status')
-rwxr-xr-xutil/board_status/to-wiki/towiki.sh11
1 files changed, 9 insertions, 2 deletions
diff --git a/util/board_status/to-wiki/towiki.sh b/util/board_status/to-wiki/towiki.sh
index 906a871ca5..db331ba975 100755
--- a/util/board_status/to-wiki/towiki.sh
+++ b/util/board_status/to-wiki/towiki.sh
@@ -330,8 +330,15 @@ EOF
cpu_nice="Intel® Atom™ 230";
socket_nice="Socket 441";;
INTEL_SOCKET_BGA956)
- cpu_nice="Intel® Pentium® M";
- socket_nice="BGA956";;
+ case $northbridge in
+ INTEL_GM45)
+ cpu_nice="Intel® Core 2 Duo (Penryn)"
+ socket_nice="Socket P";;
+ *)
+ cpu_nice="Intel® Pentium® M";
+ socket_nice="BGA956";;
+ esac
+ ;;
INTEL_SOCKET_FC_PGA370)
cpu_nice="Intel® Pentium® III / Celeron®";
socket_nice="Socket 370"