summaryrefslogtreecommitdiff
path: root/util/cbfstool
diff options
context:
space:
mode:
authorAaron Durbin <adurbin@chromium.org>2014-06-30 16:37:13 -0500
committerMarc Jones <marc.jones@se-eng.com>2015-03-04 19:51:42 +0100
commit3aca2cdced54ff525022366bc6dee949b0152d83 (patch)
tree5380f2c55a8d89c48465865634cb8933ff243a69 /util/cbfstool
parent73307e0917c9084f1dc264ac2a61a094fddf1167 (diff)
downloadcoreboot-3aca2cdced54ff525022366bc6dee949b0152d83.tar.xz
t132: load MTS microcode
The armv8 cores need to have microcode loaded before they can be taken out of reset. Locate and load the MTS microcode at the fixed address of 0x82000000. The ccplex, once enabled, will decode and transfer the microcode to the carveout region. BUG=chrome-os-partner:29922 BRANCH=None TEST=Built and ran. Confirmed dump of MTS region after loading code. Original-Change-Id: Ie5ab72e5363cbdb251d169356f718020d375fce6 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/206290 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 6726d8862c08b155b9218aa5e2e39428a105089e) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I425c2e2fd1eaec49d81bef1ff4bf4f36da9296df Reviewed-on: http://review.coreboot.org/8580 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'util/cbfstool')
0 files changed, 0 insertions, 0 deletions