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| author | Hannah Williams <hannah.williams@intel.com> | 2018-05-31 19:16:09 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-06-03 16:06:46 +0000 |
| commit | 067d38a7af16bd6ca3add8d806874571fa1151c1 (patch) | |
| tree | 671a5625a9c8cab8600ea72407e493cc067528d7 /util/crossgcc/buildgcc | |
| parent | 22e6018b282c9422c9517632045301ce5fa652ec (diff) | |
| download | coreboot-067d38a7af16bd6ca3add8d806874571fa1151c1.tar.xz | |
soc/intel/apollolake: Add Page table mapping for System Memory
Since we do not know before hand the memory range initialized by FSP memory
init until it completes and as memory gets accessed from within FSP memory
init to migrate FSP from CAR to memory, we need to add this mapping in
coreboot.
Change-Id: I1ce2d489240e6e3686ceb7f6e824e5a94398d47e
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/26745
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'util/crossgcc/buildgcc')
0 files changed, 0 insertions, 0 deletions