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authorJulius Werner <jwerner@chromium.org>2016-02-01 19:47:10 -0800
committerPatrick Georgi <pgeorgi@google.com>2016-02-10 09:39:36 +0100
commit3834520ba1da2587e0e4bcdcc447b110314cb2ee (patch)
tree8b8f456a70d0babd4fa47391f94facb7f45c17e7 /util/crossgcc
parent372d0ff1d12b23f3c724f7c35fa57e4858dc0db6 (diff)
downloadcoreboot-3834520ba1da2587e0e4bcdcc447b110314cb2ee.tar.xz
arch/arm64: Use correct SPSR.DAIF mask for BL31 and payload
The PSTATE mask bits for Debug exceptions, external Aborts, Interrupts and Fast interrupts are usually best left unset: under normal circumstances none of those exceptions should occur in firmware, and if they do it's better to get a crash close to the code that caused it (rather than much later when the kernel first unmasks them). For this reason arm64_cpu_init unmasks them right after boot. However, the EL2 payload was still running with all mask bits set, which this patch fixes. BL31, on the other hand, explicitly wants to be entered with all masks set (see calling convention in docs/firmware-design.md), which we had previously not been doing. It doesn't seem to make a difference at the moment, but since it's explicitly specified we should probably comply. BRANCH=None BUG=None TEST=Booted Oak, confirmed with raw_read_daif() in payload that mask bits are now cleared. Change-Id: I04406da4c435ae7d44e2592c41f9807934bbc802 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 6ba55bc23fbde962d91c87dc0f982437572a69a8 Original-Change-Id: Ic5fbdd4e1cd7933c8b0c7c5fe72eac2022c9553c Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/325056 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/13596 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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